KR101084957B1 - 구리 기술 상호연결 구조를 사용하는 집적 회로 디바이스의 알루미늄 패드 파워 버스 및 신호 루팅 - Google Patents
구리 기술 상호연결 구조를 사용하는 집적 회로 디바이스의 알루미늄 패드 파워 버스 및 신호 루팅 Download PDFInfo
- Publication number
- KR101084957B1 KR101084957B1 KR1020040023990A KR20040023990A KR101084957B1 KR 101084957 B1 KR101084957 B1 KR 101084957B1 KR 1020040023990 A KR1020040023990 A KR 1020040023990A KR 20040023990 A KR20040023990 A KR 20040023990A KR 101084957 B1 KR101084957 B1 KR 101084957B1
- Authority
- KR
- South Korea
- Prior art keywords
- interconnect
- power bus
- delete delete
- layer
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76885—By forming conductive members before deposition of protective insulating material, e.g. pillars, studs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Layout of the interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Layout of the interconnection structure
- H01L23/5283—Cross-sectional geometry
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Layout of the interconnection structure
- H01L23/5286—Arrangements of power or ground buses
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US46250403P | 2003-04-10 | 2003-04-10 | |
| US60/462,504 | 2003-04-10 | ||
| US10/675,258 | 2003-09-30 | ||
| US10/675,258 US7566964B2 (en) | 2003-04-10 | 2003-09-30 | Aluminum pad power bus and signal routing for integrated circuit devices utilizing copper technology interconnect structures |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20040089496A KR20040089496A (ko) | 2004-10-21 |
| KR101084957B1 true KR101084957B1 (ko) | 2011-11-23 |
Family
ID=32096363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020040023990A Expired - Lifetime KR101084957B1 (ko) | 2003-04-10 | 2004-04-08 | 구리 기술 상호연결 구조를 사용하는 집적 회로 디바이스의 알루미늄 패드 파워 버스 및 신호 루팅 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7566964B2 (enExample) |
| JP (2) | JP5258142B2 (enExample) |
| KR (1) | KR101084957B1 (enExample) |
| GB (2) | GB2427074B (enExample) |
| TW (1) | TWI344685B (enExample) |
Families Citing this family (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7335536B2 (en) | 2005-09-01 | 2008-02-26 | Texas Instruments Incorporated | Method for fabricating low resistance, low inductance interconnections in high current semiconductor devices |
| US8319343B2 (en) * | 2005-09-21 | 2012-11-27 | Agere Systems Llc | Routing under bond pad for the replacement of an interconnect layer |
| US7952206B2 (en) * | 2005-09-27 | 2011-05-31 | Agere Systems Inc. | Solder bump structure for flip chip semiconductor devices and method of manufacture therefore |
| US8552560B2 (en) * | 2005-11-18 | 2013-10-08 | Lsi Corporation | Alternate pad structures/passivation inegration schemes to reduce or eliminate IMC cracking in post wire bonded dies during Cu/Low-K BEOL processing |
| TWI288463B (en) * | 2006-04-26 | 2007-10-11 | Siliconware Precision Industries Co Ltd | Semiconductor package substrate and semiconductor package having the substrate |
| US7888257B2 (en) * | 2007-10-10 | 2011-02-15 | Agere Systems Inc. | Integrated circuit package including wire bonds |
| EP2195837A1 (en) * | 2007-10-31 | 2010-06-16 | Agere Systems Inc. | Bond pad support structure for semiconductor device |
| US20100289132A1 (en) * | 2009-05-13 | 2010-11-18 | Shih-Fu Huang | Substrate having embedded single patterned metal layer, and package applied with the same, and methods of manufacturing of the substrate and package |
| US20110084372A1 (en) * | 2009-10-14 | 2011-04-14 | Advanced Semiconductor Engineering, Inc. | Package carrier, semiconductor package, and process for fabricating same |
| US8786062B2 (en) * | 2009-10-14 | 2014-07-22 | Advanced Semiconductor Engineering, Inc. | Semiconductor package and process for fabricating same |
| US8569894B2 (en) | 2010-01-13 | 2013-10-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
| TWI411075B (zh) | 2010-03-22 | 2013-10-01 | 日月光半導體製造股份有限公司 | 半導體封裝件及其製造方法 |
| US8753917B2 (en) * | 2010-12-14 | 2014-06-17 | International Business Machines Corporation | Method of fabricating photoconductor-on-active pixel device |
| JP2013229455A (ja) * | 2012-04-26 | 2013-11-07 | Renesas Electronics Corp | 半導体装置および半導体装置の製造方法 |
| US20220293661A1 (en) * | 2021-03-11 | 2022-09-15 | Raytheon Company | Offset vertical interconnect and compression post for 3d-integrated electrical device |
Family Cites Families (40)
| Publication number | Priority date | Publication date | Assignee | Title |
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| JPS5851425B2 (ja) | 1975-08-22 | 1983-11-16 | 株式会社日立製作所 | ハンドウタイソウチ |
| US4840923A (en) | 1986-04-30 | 1989-06-20 | International Business Machine Corporation | Simultaneous multiple level interconnection process |
| JPH02163960A (ja) | 1988-12-16 | 1990-06-25 | Toshiba Corp | 半導体装置 |
| US5719448A (en) | 1989-03-07 | 1998-02-17 | Seiko Epson Corporation | Bonding pad structures for semiconductor integrated circuits |
| JPH05226584A (ja) * | 1992-02-12 | 1993-09-03 | Yamaha Corp | 集積回路装置 |
| US5436412A (en) * | 1992-10-30 | 1995-07-25 | International Business Machines Corporation | Interconnect structure having improved metallization |
| JPH0831820A (ja) * | 1994-07-19 | 1996-02-02 | Sony Corp | 半導体装置 |
| US6331482B1 (en) * | 1996-06-26 | 2001-12-18 | Micron Technology, Inc. | Method of VLSI contact, trench, and via filling using a germanium underlayer with metallization |
| US6130161A (en) * | 1997-05-30 | 2000-10-10 | International Business Machines Corporation | Method of forming copper interconnections with enhanced electromigration resistance and reduced defect sensitivity |
| JP3660799B2 (ja) * | 1997-09-08 | 2005-06-15 | 株式会社ルネサステクノロジ | 半導体集積回路装置の製造方法 |
| US6448650B1 (en) * | 1998-05-18 | 2002-09-10 | Texas Instruments Incorporated | Fine pitch system and method for reinforcing bond pads in semiconductor devices |
| US6232662B1 (en) * | 1998-07-14 | 2001-05-15 | Texas Instruments Incorporated | System and method for bonding over active integrated circuits |
| US6225207B1 (en) | 1998-10-01 | 2001-05-01 | Applied Materials, Inc. | Techniques for triple and quadruple damascene fabrication |
| US6018187A (en) * | 1998-10-19 | 2000-01-25 | Hewlett-Packard Cmpany | Elevated pin diode active pixel sensor including a unique interconnection structure |
| US6261944B1 (en) | 1998-11-24 | 2001-07-17 | Vantis Corporation | Method for forming a semiconductor device having high reliability passivation overlying a multi-level interconnect |
| TW445616B (en) * | 1998-12-04 | 2001-07-11 | Koninkl Philips Electronics Nv | An integrated circuit device |
| US6756295B2 (en) | 1998-12-21 | 2004-06-29 | Megic Corporation | Chip structure and process for forming the same |
| SG93278A1 (en) | 1998-12-21 | 2002-12-17 | Mou Shiung Lin | Top layers of metal for high performance ics |
| TW426980B (en) * | 1999-01-23 | 2001-03-21 | Lucent Technologies Inc | Wire bonding to copper |
| JP2000216184A (ja) * | 1999-01-25 | 2000-08-04 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
| US20020000665A1 (en) * | 1999-04-05 | 2002-01-03 | Alexander L. Barr | Semiconductor device conductive bump and interconnect barrier |
| JP3542517B2 (ja) * | 1999-04-27 | 2004-07-14 | Necエレクトロニクス株式会社 | 半導体装置 |
| US6107185A (en) * | 1999-04-29 | 2000-08-22 | Advanced Micro Devices, Inc. | Conductive material adhesion enhancement in damascene process for semiconductors |
| US6204165B1 (en) | 1999-06-24 | 2001-03-20 | International Business Machines Corporation | Practical air dielectric interconnections by post-processing standard CMOS wafers |
| US6410435B1 (en) * | 1999-10-01 | 2002-06-25 | Agere Systems Guardian Corp. | Process for fabricating copper interconnect for ULSI integrated circuits |
| US6451681B1 (en) * | 1999-10-04 | 2002-09-17 | Motorola, Inc. | Method of forming copper interconnection utilizing aluminum capping film |
| US6198170B1 (en) * | 1999-12-16 | 2001-03-06 | Conexant Systems, Inc. | Bonding pad and support structure and method for their fabrication |
| US6376353B1 (en) * | 2000-07-03 | 2002-04-23 | Chartered Semiconductor Manufacturing Ltd. | Aluminum and copper bimetallic bond pad scheme for copper damascene interconnects |
| WO2002029892A2 (en) * | 2000-10-03 | 2002-04-11 | Broadcom Corporation | High-density metal capacitor using dual-damascene copper interconnect |
| US6348732B1 (en) * | 2000-11-18 | 2002-02-19 | Advanced Micro Devices, Inc. | Amorphized barrier layer for integrated circuit interconnects |
| JP2002222928A (ja) * | 2001-01-29 | 2002-08-09 | Sony Corp | 半導体装置 |
| US6649993B2 (en) * | 2001-03-16 | 2003-11-18 | Agilent Technologies, Inc. | Simplified upper electrode contact structure for PIN diode active pixel sensor |
| US6455943B1 (en) * | 2001-04-24 | 2002-09-24 | United Microelectronics Corp. | Bonding pad structure of semiconductor device having improved bondability |
| JP2002329722A (ja) * | 2001-04-27 | 2002-11-15 | Nec Corp | 半導体装置及びその製造方法 |
| US6979896B2 (en) * | 2001-10-30 | 2005-12-27 | Intel Corporation | Power gridding scheme |
| US6798073B2 (en) * | 2001-12-13 | 2004-09-28 | Megic Corporation | Chip structure and process for forming the same |
| US6614091B1 (en) * | 2002-03-13 | 2003-09-02 | Motorola, Inc. | Semiconductor device having a wire bond pad and method therefor |
| US20030218259A1 (en) * | 2002-05-21 | 2003-11-27 | Chesire Daniel Patrick | Bond pad support structure for a semiconductor device |
| JP2004111796A (ja) * | 2002-09-20 | 2004-04-08 | Hitachi Ltd | 半導体装置 |
| US6717270B1 (en) * | 2003-04-09 | 2004-04-06 | Motorola, Inc. | Integrated circuit die I/O cells |
-
2003
- 2003-09-30 US US10/675,258 patent/US7566964B2/en not_active Expired - Lifetime
-
2004
- 2004-03-03 GB GB0615199A patent/GB2427074B/en not_active Expired - Fee Related
- 2004-03-03 GB GB0404852A patent/GB2401245B/en not_active Expired - Fee Related
- 2004-03-29 TW TW093108543A patent/TWI344685B/zh not_active IP Right Cessation
- 2004-04-08 KR KR1020040023990A patent/KR101084957B1/ko not_active Expired - Lifetime
- 2004-04-09 JP JP2004114863A patent/JP5258142B2/ja not_active Expired - Fee Related
-
2011
- 2011-10-27 JP JP2011236296A patent/JP2012054588A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| TWI344685B (en) | 2011-07-01 |
| TW200503168A (en) | 2005-01-16 |
| US20040201101A1 (en) | 2004-10-14 |
| KR20040089496A (ko) | 2004-10-21 |
| US7566964B2 (en) | 2009-07-28 |
| GB0404852D0 (en) | 2004-04-07 |
| JP5258142B2 (ja) | 2013-08-07 |
| GB2401245B (en) | 2006-12-20 |
| GB2401245A (en) | 2004-11-03 |
| GB2427074A (en) | 2006-12-13 |
| GB0615199D0 (en) | 2006-09-06 |
| JP2004320018A (ja) | 2004-11-11 |
| GB2427074B (en) | 2007-06-27 |
| JP2012054588A (ja) | 2012-03-15 |
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