KR101049491B1 - 기판 처리 방법 및 컴퓨터 판독 가능한 기억 매체 - Google Patents

기판 처리 방법 및 컴퓨터 판독 가능한 기억 매체 Download PDF

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KR101049491B1
KR101049491B1 KR1020060092089A KR20060092089A KR101049491B1 KR 101049491 B1 KR101049491 B1 KR 101049491B1 KR 1020060092089 A KR1020060092089 A KR 1020060092089A KR 20060092089 A KR20060092089 A KR 20060092089A KR 101049491 B1 KR101049491 B1 KR 101049491B1
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film
etching
wafer
processing method
substrate processing
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KR20070036670A (ko
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야스시 후지이
다카유키 도시마
다케히코 오리이
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도쿄엘렉트론가부시키가이샤
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
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    • H01L21/02057—Cleaning during device manufacture
    • H01L21/0206—Cleaning during device manufacture during, before or after processing of insulating layers
    • H01L21/02063—Cleaning during device manufacture during, before or after processing of insulating layers the processing being the formation of vias or contact holes
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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    • H01L21/3105—After-treatment
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
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    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67028—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
    • H01L21/6704—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing
    • H01L21/67051—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for wet cleaning or washing using mainly spraying means, e.g. nozzles
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    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/67161—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the layout of the process chambers
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    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
    • H01L21/76808—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving intermediate temporary filling with material
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Weting (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
KR1020060092089A 2005-09-29 2006-09-22 기판 처리 방법 및 컴퓨터 판독 가능한 기억 매체 Expired - Fee Related KR101049491B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2005-00285432 2005-09-29
JP2005285432 2005-09-29

Publications (2)

Publication Number Publication Date
KR20070036670A KR20070036670A (ko) 2007-04-03
KR101049491B1 true KR101049491B1 (ko) 2011-07-15

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Country Status (6)

Country Link
US (1) US7482281B2 (enExample)
EP (1) EP1770765B1 (enExample)
KR (1) KR101049491B1 (enExample)
CN (1) CN100517603C (enExample)
SG (1) SG131052A1 (enExample)
TW (1) TW200721381A (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5019741B2 (ja) * 2005-11-30 2012-09-05 東京エレクトロン株式会社 半導体装置の製造方法および基板処理システム
KR100723889B1 (ko) 2006-06-30 2007-05-31 주식회사 하이닉스반도체 직렬 입/출력 인터페이스를 가진 멀티 포트 메모리 소자
JP2009065000A (ja) * 2007-09-07 2009-03-26 Tokyo Electron Ltd 基板の処理方法、プログラム、コンピュータ記憶媒体及び基板処理システム
US8282984B2 (en) * 2007-12-03 2012-10-09 Tokyo Electron Limited Processing condition inspection and optimization method of damage recovery process, damage recovering system and storage medium
JP5342811B2 (ja) * 2008-06-09 2013-11-13 東京エレクトロン株式会社 半導体装置の製造方法
US8753933B2 (en) * 2008-11-19 2014-06-17 Micron Technology, Inc. Methods for forming a conductive material, methods for selectively forming a conductive material, methods for forming platinum, and methods for forming conductive structures
JP5705751B2 (ja) 2009-03-10 2015-04-22 レール・リキード−ソシエテ・アノニム・プール・レテュード・エ・レクスプロワタシオン・デ・プロセデ・ジョルジュ・クロード ｌｏｗ−ｋシリル化用の環式アミノ化合物
JP5381388B2 (ja) * 2009-06-23 2014-01-08 東京エレクトロン株式会社 液処理装置
US20110076623A1 (en) * 2009-09-29 2011-03-31 Tokyo Electron Limited Method for reworking silicon-containing arc layers on a substrate
US7981699B2 (en) * 2009-10-22 2011-07-19 Lam Research Corporation Method for tunably repairing low-k dielectric damage
JP5424848B2 (ja) * 2009-12-15 2014-02-26 株式会社東芝 半導体基板の表面処理装置及び方法
JP5782279B2 (ja) * 2011-01-20 2015-09-24 株式会社Ｓｃｒｅｅｎホールディングス 基板処理方法および基板処理装置
EP3693990B1 (en) 2011-06-23 2023-06-07 Brooks Automation (Germany) GmbH Semiconductor cleaner systems and methods
JP5917861B2 (ja) * 2011-08-30 2016-05-18 株式会社Ｓｃｒｅｅｎホールディングス 基板処理方法
US8859430B2 (en) * 2012-06-22 2014-10-14 Tokyo Electron Limited Sidewall protection of low-K material during etching and ashing
TWI581331B (zh) 2012-07-13 2017-05-01 應用材料股份有限公司 降低多孔低ｋ膜的介電常數之方法
JP6754257B2 (ja) * 2016-09-26 2020-09-09 株式会社Ｓｃｒｅｅｎホールディングス 基板処理方法
KR102093152B1 (ko) 2017-10-17 2020-03-25 삼성전기주식회사 엔벨로프 트래킹 전류 바이어스 회로 및 파워 증폭 장치
US12410523B1 (en) * 2024-03-29 2025-09-09 Applied Materials, Inc. Integrated low k recovery and ALD metal deposition process for advanced technology node

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004088042A (ja) 2002-06-26 2004-03-18 Tokyo Electron Ltd デバイス用溝構造体の製造方法
US20050106762A1 (en) 2003-09-03 2005-05-19 Nirupama Chakrapani Recovery of hydrophobicity of low-k and ultra low-k organosilicate films used as inter metal dielectrics

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05205989A (ja) * 1992-01-28 1993-08-13 Hitachi Ltd リソグラフィ法及び半導体装置の製造方法
US6270948B1 (en) * 1996-08-22 2001-08-07 Kabushiki Kaisha Toshiba Method of forming pattern
JP3403373B2 (ja) * 2000-05-26 2003-05-06 松下電器産業株式会社 有機膜のエッチング方法、半導体装置の製造方法及びパターンの形成方法
EP1416069B1 (en) * 2001-08-09 2010-10-27 Asahi Kasei Kabushiki Kaisha Organic semiconductor film and method for manufacture thereof
JP4678665B2 (ja) * 2001-11-15 2011-04-27 東京エレクトロン株式会社 基板処理方法および基板処理装置
US7169540B2 (en) * 2002-04-12 2007-01-30 Tokyo Electron Limited Method of treatment of porous dielectric films to reduce damage during cleaning
KR100564565B1 (ko) * 2002-11-14 2006-03-28 삼성전자주식회사 실리콘을 함유하는 폴리머 및 이를 포함하는 네가티브형레지스트 조성물과 이들을 이용한 반도체 소자의 패턴형성 방법
JP2004214388A (ja) 2002-12-27 2004-07-29 Tokyo Electron Ltd 基板処理方法
US7709371B2 (en) * 2003-01-25 2010-05-04 Honeywell International Inc. Repairing damage to low-k dielectric materials using silylating agents
CN100568457C (zh) * 2003-10-02 2009-12-09 株式会社半导体能源研究所 半导体装置的制造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004088042A (ja) 2002-06-26 2004-03-18 Tokyo Electron Ltd デバイス用溝構造体の製造方法
US20050106762A1 (en) 2003-09-03 2005-05-19 Nirupama Chakrapani Recovery of hydrophobicity of low-k and ultra low-k organosilicate films used as inter metal dielectrics

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KR20070036670A (ko) 2007-04-03
EP1770765A3 (en) 2010-11-10
US20070077768A1 (en) 2007-04-05
CN100517603C (zh) 2009-07-22
SG131052A1 (en) 2007-04-26
TW200721381A (en) 2007-06-01
EP1770765A2 (en) 2007-04-04
EP1770765B1 (en) 2013-03-27
CN1953145A (zh) 2007-04-25
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