KR101033464B1 - 반도체 집적 회로 - Google Patents

반도체 집적 회로 Download PDF

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Publication number
KR101033464B1
KR101033464B1 KR1020080130991A KR20080130991A KR101033464B1 KR 101033464 B1 KR101033464 B1 KR 101033464B1 KR 1020080130991 A KR1020080130991 A KR 1020080130991A KR 20080130991 A KR20080130991 A KR 20080130991A KR 101033464 B1 KR101033464 B1 KR 101033464B1
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KR
South Korea
Prior art keywords
write
command
read
burst
address
Prior art date
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KR1020080130991A
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English (en)
Korean (ko)
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KR20100072555A (ko
Inventor
이경하
Original Assignee
주식회사 하이닉스반도체
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Application filed by 주식회사 하이닉스반도체 filed Critical 주식회사 하이닉스반도체
Priority to KR1020080130991A priority Critical patent/KR101033464B1/ko
Priority to US12/493,755 priority patent/US8050137B2/en
Priority to JP2009175733A priority patent/JP2010146690A/ja
Priority to CN200910166431.4A priority patent/CN101763888B/zh
Publication of KR20100072555A publication Critical patent/KR20100072555A/ko
Application granted granted Critical
Publication of KR101033464B1 publication Critical patent/KR101033464B1/ko
Priority to US13/241,847 priority patent/US8953410B2/en
Priority to US14/284,816 priority patent/US9281035B2/en
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Anticipated expiration legal-status Critical

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • G11C7/1027—Static column decode serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled bit line addresses
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/109—Control signal input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/04—Arrangements for selecting an address in a digital store using a sequential addressing device, e.g. shift register, counter
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
KR1020080130991A 2008-12-22 2008-12-22 반도체 집적 회로 Active KR101033464B1 (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1020080130991A KR101033464B1 (ko) 2008-12-22 2008-12-22 반도체 집적 회로
US12/493,755 US8050137B2 (en) 2008-12-22 2009-06-29 Semiconductor integrated circuit capable of controlling read command
JP2009175733A JP2010146690A (ja) 2008-12-22 2009-07-28 半導体集積回路
CN200910166431.4A CN101763888B (zh) 2008-12-22 2009-08-12 能够控制读命令的半导体集成电路
US13/241,847 US8953410B2 (en) 2008-12-22 2011-09-23 Semiconductor integrated circuit capable of controlling read command
US14/284,816 US9281035B2 (en) 2008-12-22 2014-05-22 Semiconductor integrated circuit capable of controlling read command

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020080130991A KR101033464B1 (ko) 2008-12-22 2008-12-22 반도체 집적 회로

Publications (2)

Publication Number Publication Date
KR20100072555A KR20100072555A (ko) 2010-07-01
KR101033464B1 true KR101033464B1 (ko) 2011-05-09

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020080130991A Active KR101033464B1 (ko) 2008-12-22 2008-12-22 반도체 집적 회로

Country Status (4)

Country Link
US (3) US8050137B2 (https=)
JP (1) JP2010146690A (https=)
KR (1) KR101033464B1 (https=)
CN (1) CN101763888B (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190123184A (ko) * 2018-04-23 2019-10-31 에스케이하이닉스 주식회사 반도체장치

Families Citing this family (19)

* Cited by examiner, † Cited by third party
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KR100945794B1 (ko) * 2008-05-02 2010-03-08 주식회사 하이닉스반도체 반도체 집적회로 및 그 어드레스/커맨드 처리방법
KR20120019882A (ko) * 2010-08-27 2012-03-07 주식회사 하이닉스반도체 반도체 집적회로
KR20130091034A (ko) * 2012-02-07 2013-08-16 에스케이하이닉스 주식회사 반도체 메모리 장치 및 이를 포함하는 반도체 집적 회로
KR20130097574A (ko) * 2012-02-24 2013-09-03 에스케이하이닉스 주식회사 커맨드디코더
US8873264B1 (en) 2012-08-24 2014-10-28 Cypress Semiconductor Corporation Data forwarding circuits and methods for memory devices with write latency
US8527802B1 (en) * 2012-08-24 2013-09-03 Cypress Semiconductor Corporation Memory device data latency circuits and methods
KR102091394B1 (ko) 2013-03-04 2020-03-20 삼성전자 주식회사 저항체를 이용한 비휘발성 메모리 장치 및 그 구동 방법
TWI528362B (zh) * 2013-05-30 2016-04-01 鈺創科技股份有限公司 靜態隨機存取記憶體系統及其操作方法
US9171600B2 (en) * 2013-09-04 2015-10-27 Naoki Shimizu Semiconductor memory device
KR102164019B1 (ko) * 2014-01-27 2020-10-12 에스케이하이닉스 주식회사 버스트 랭스 제어 장치 및 이를 포함하는 반도체 장치
KR102299380B1 (ko) * 2014-12-19 2021-09-08 에스케이하이닉스 주식회사 반도체 장치 및 그의 구동방법
JP2016162091A (ja) * 2015-02-27 2016-09-05 富士通株式会社 プログラムプロファイラ回路、プロセッサおよびプログラムカウント方法
KR20180058478A (ko) * 2016-11-24 2018-06-01 에스케이하이닉스 주식회사 반도체 장치, 이를 포함하는 반도체 시스템 및 반도체 장치의 리드 및 라이트 동작 방법
KR102370156B1 (ko) * 2017-08-23 2022-03-07 삼성전자주식회사 메모리 시스템, 및 이를 위한 메모리 모듈과 반도체 메모리 장치
KR20200033691A (ko) * 2018-09-20 2020-03-30 에스케이하이닉스 주식회사 반도체장치
KR102638793B1 (ko) * 2018-10-01 2024-02-21 에스케이하이닉스 주식회사 반도체장치
KR102692011B1 (ko) * 2018-11-02 2024-08-05 에스케이하이닉스 주식회사 반도체장치
JP7476676B2 (ja) * 2020-06-04 2024-05-01 富士通株式会社 演算処理装置
US11456024B2 (en) 2020-09-14 2022-09-27 Micron Technology, Inc. Variable clock divider

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KR100574108B1 (ko) 1995-05-24 2006-04-26 가부시끼가이샤 히다치 세이사꾸쇼 반도체기억장치
KR20080002492A (ko) * 2006-06-30 2008-01-04 주식회사 하이닉스반도체 동기식 반도체 메모리 소자 및 그의 구동방법

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JP2000067577A (ja) * 1998-06-10 2000-03-03 Mitsubishi Electric Corp 同期型半導体記憶装置
JP4011833B2 (ja) * 2000-06-30 2007-11-21 株式会社東芝 半導体メモリ
JP2002245778A (ja) * 2001-02-16 2002-08-30 Fujitsu Ltd 半導体装置
US6549452B1 (en) * 2001-12-20 2003-04-15 Integrated Device Technology, Inc. Variable width wordline pulses in a memory device
JP4383028B2 (ja) * 2002-08-15 2009-12-16 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置及びその制御方法
JP4439838B2 (ja) * 2003-05-26 2010-03-24 Ｎｅｃエレクトロニクス株式会社 半導体記憶装置及びその制御方法
KR100546389B1 (ko) * 2003-10-22 2006-01-26 삼성전자주식회사 카스 레이턴시에 따라 동기되는 타이밍이 변하는 반도체메모리 장치
KR100666873B1 (ko) * 2003-12-24 2007-01-10 삼성전자주식회사 제1 이중 데이터 율 및 제2 이중 데이터 율 겸용싱크로너스 디램
US7142477B1 (en) * 2004-06-18 2006-11-28 Cypress Semiconductor Corp. Memory interface system and method for reducing cycle time of sequential read and write accesses using separate address and data buses
KR100638747B1 (ko) 2004-12-28 2006-10-30 주식회사 하이닉스반도체 반도체 기억 소자의 클럭 생성 장치 및 방법
CN101189682B (zh) * 2005-05-30 2010-10-13 精工爱普生株式会社 半导体存储装置
KR100807111B1 (ko) 2005-09-29 2008-02-27 주식회사 하이닉스반도체 출력 제어장치
JP4953348B2 (ja) * 2005-09-29 2012-06-13 ハイニックス セミコンダクター インク 半導体メモリ素子の内部アドレス生成装置
KR100753081B1 (ko) * 2005-09-29 2007-08-31 주식회사 하이닉스반도체 내부 어드레스 생성장치를 구비하는 반도체메모리소자

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KR100574108B1 (ko) 1995-05-24 2006-04-26 가부시끼가이샤 히다치 세이사꾸쇼 반도체기억장치
KR20080002492A (ko) * 2006-06-30 2008-01-04 주식회사 하이닉스반도체 동기식 반도체 메모리 소자 및 그의 구동방법

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190123184A (ko) * 2018-04-23 2019-10-31 에스케이하이닉스 주식회사 반도체장치
KR102538702B1 (ko) * 2018-04-23 2023-06-01 에스케이하이닉스 주식회사 반도체장치

Also Published As

Publication number Publication date
CN101763888B (zh) 2014-11-26
KR20100072555A (ko) 2010-07-01
US20120008452A1 (en) 2012-01-12
US20100157717A1 (en) 2010-06-24
US8050137B2 (en) 2011-11-01
US8953410B2 (en) 2015-02-10
JP2010146690A (ja) 2010-07-01
CN101763888A (zh) 2010-06-30
US20140254287A1 (en) 2014-09-11
US9281035B2 (en) 2016-03-08

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