KR100893959B1 - 처리 방법 및 플라즈마 에칭 방법 - Google Patents

처리 방법 및 플라즈마 에칭 방법 Download PDF

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Publication number
KR100893959B1
KR100893959B1 KR1020070016303A KR20070016303A KR100893959B1 KR 100893959 B1 KR100893959 B1 KR 100893959B1 KR 1020070016303 A KR1020070016303 A KR 1020070016303A KR 20070016303 A KR20070016303 A KR 20070016303A KR 100893959 B1 KR100893959 B1 KR 100893959B1
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KR
South Korea
Prior art keywords
etching
plasma
silicon
layer
resist
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KR1020070016303A
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English (en)
Korean (ko)
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KR20070082883A (ko
Inventor
나카야 미치코
Original Assignee
도쿄엘렉트론가부시키가이샤
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Publication of KR20070082883A publication Critical patent/KR20070082883A/ko
Application granted granted Critical
Publication of KR100893959B1 publication Critical patent/KR100893959B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
  • Element Separation (AREA)
KR1020070016303A 2006-02-17 2007-02-16 처리 방법 및 플라즈마 에칭 방법 KR100893959B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2006-00040536 2006-02-17
JP2006040536A JP4722725B2 (ja) 2006-02-17 2006-02-17 処理方法およびプラズマエッチング方法

Publications (2)

Publication Number Publication Date
KR20070082883A KR20070082883A (ko) 2007-08-22
KR100893959B1 true KR100893959B1 (ko) 2009-04-20

Family

ID=38497875

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070016303A KR100893959B1 (ko) 2006-02-17 2007-02-16 처리 방법 및 플라즈마 에칭 방법

Country Status (2)

Country Link
JP (1) JP4722725B2 (ja)
KR (1) KR100893959B1 (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5203340B2 (ja) 2009-12-01 2013-06-05 東京エレクトロン株式会社 半導体装置の製造方法
JP2013084695A (ja) * 2011-10-06 2013-05-09 Tokyo Electron Ltd 半導体装置の製造方法
JP5792613B2 (ja) * 2011-12-28 2015-10-14 株式会社日立ハイテクノロジーズ プラズマエッチング方法
JP2013258244A (ja) 2012-06-12 2013-12-26 Tokyo Electron Ltd エッチング方法及びプラズマ処理装置
JP5878091B2 (ja) * 2012-07-20 2016-03-08 東京エレクトロン株式会社 エッチング方法
JP5889368B2 (ja) * 2013-09-05 2016-03-22 Ｓｐｐテクノロジーズ株式会社 プラズマエッチング方法
JP6817168B2 (ja) * 2017-08-25 2021-01-20 東京エレクトロン株式会社 被処理体を処理する方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR890003002A (ko) * 1987-07-29 1989-04-12 미다 가쓰시게 드라이 에칭 방법
KR100405578B1 (ko) * 1996-04-26 2003-11-14 가부시끼가이샤 히다치 세이사꾸쇼 반도체 장치의 제조 방법
US6712927B1 (en) * 1998-06-11 2004-03-30 Applied Materials Inc. Chamber having process monitoring window

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3267199B2 (ja) * 1996-07-11 2002-03-18 株式会社デンソー 半導体装置の製造方法
JPH11243080A (ja) * 1998-02-25 1999-09-07 Nec Corp 半導体基板のエッチング方法
JP4381694B2 (ja) * 2003-02-25 2009-12-09 株式会社日立ハイテクノロジーズ 試料の表面処理方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR890003002A (ko) * 1987-07-29 1989-04-12 미다 가쓰시게 드라이 에칭 방법
KR100405578B1 (ko) * 1996-04-26 2003-11-14 가부시끼가이샤 히다치 세이사꾸쇼 반도체 장치의 제조 방법
US6712927B1 (en) * 1998-06-11 2004-03-30 Applied Materials Inc. Chamber having process monitoring window

Also Published As

Publication number Publication date
KR20070082883A (ko) 2007-08-22
JP4722725B2 (ja) 2011-07-13
JP2007220939A (ja) 2007-08-30

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