KR100786418B1 - Ｄｒａｍ에서의 메모리 동작 수행 방법 - Google Patents

Ｄｒａｍ에서의 메모리 동작 수행 방법 Download PDF

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Publication number
KR100786418B1
KR100786418B1 KR1020010058049A KR20010058049A KR100786418B1 KR 100786418 B1 KR100786418 B1 KR 100786418B1 KR 1020010058049 A KR1020010058049 A KR 1020010058049A KR 20010058049 A KR20010058049 A KR 20010058049A KR 100786418 B1 KR100786418 B1 KR 100786418B1
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South Korea
Prior art keywords
memory
address
group
banks
dram
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Expired - Fee Related
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KR1020010058049A
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English (en)
Korean (ko)
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KR20020022618A (ko
Inventor
쿡죤에이치3세
싱프리트피
푸엔테에드먼도데라
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애질런트 테크놀로지스, 인크.
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Publication of KR20020022618A publication Critical patent/KR20020022618A/ko
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

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  • Tests Of Electronic Circuits (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
  • Memory System (AREA)
KR1020010058049A 2000-09-20 2001-09-19 Ｄｒａｍ에서의 메모리 동작 수행 방법 Expired - Fee Related KR100786418B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/665,892 US6320812B1 (en) 2000-09-20 2000-09-20 Error catch RAM for memory tester has SDRAM memory sets configurable for size and speed
US09/665,892 2000-09-20

Publications (2)

Publication Number Publication Date
KR20020022618A KR20020022618A (ko) 2002-03-27
KR100786418B1 true KR100786418B1 (ko) 2007-12-17

Family

ID=24671977

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020010058049A Expired - Fee Related KR100786418B1 (ko) 2000-09-20 2001-09-19 Ｄｒａｍ에서의 메모리 동작 수행 방법

Country Status (6)

Country Link
US (1) US6320812B1 (enExample)
EP (1) EP1193716B1 (enExample)
JP (1) JP2002189632A (enExample)
KR (1) KR100786418B1 (enExample)
DE (1) DE60111324T2 (enExample)
TW (1) TW559821B (enExample)

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US6651204B1 (en) * 2000-06-01 2003-11-18 Advantest Corp. Modular architecture for memory testing on event based test system
US20020082884A1 (en) * 2000-12-22 2002-06-27 Moroney Brady J. Manufacturing and testing communications system
JP2002216495A (ja) * 2001-01-18 2002-08-02 Mitsubishi Electric Corp メモリデバイス冗長救済解析方法、記録媒体および装置
US6574764B2 (en) * 2001-04-25 2003-06-03 Agilent Technologies, Inc. Algorithmically programmable memory tester with history FIFO's that aid in error analysis and recovery
US7158900B2 (en) * 2002-01-07 2007-01-02 Siemens Energy & Automation, Inc. Pulse output function for programmable logic controller
EP1546870A2 (en) 2002-06-03 2005-06-29 Siemens Energy & Automation, Inc. A wizard for programming an intelligent module
US7082075B2 (en) * 2004-03-18 2006-07-25 Micron Technology, Inc. Memory device and method having banks of different sizes
JP2006266835A (ja) * 2005-03-23 2006-10-05 Advantest Corp 試験装置、試験方法、及び試験制御プログラム
KR100708183B1 (ko) * 2005-09-26 2007-04-17 삼성전자주식회사 움직임 추정을 위한 영상 데이터 저장 장치 및 그 데이터저장 방법
DE102006016499B4 (de) * 2006-04-07 2014-11-13 Qimonda Ag Speichermodulsteuerung, Speichersteuerung und entsprechende Speicheranordnung sowie Verfahren zur Fehlerkorrektur
US20080189479A1 (en) * 2007-02-02 2008-08-07 Sigmatel, Inc. Device, system and method for controlling memory operations
JP2008300948A (ja) * 2007-05-29 2008-12-11 Sharp Corp データ処理装置
US7606067B2 (en) * 2007-07-06 2009-10-20 International Business Machines Corporation Method to create a uniformly distributed multi-level cell (MLC) bitstream from a non-uniform MLC bitstream
US7623365B2 (en) * 2007-08-29 2009-11-24 Micron Technology, Inc. Memory device interface methods, apparatus, and systems
US8117004B2 (en) * 2008-03-30 2012-02-14 Advantest Corporation Testing module, testing apparatus and testing method
US7779313B2 (en) 2008-03-30 2010-08-17 Advantest Corporation Testing apparatus and testing method
US8010851B2 (en) * 2008-03-31 2011-08-30 Advantest Corporation Testing module, testing apparatus and testing method
KR20100100395A (ko) * 2009-03-06 2010-09-15 삼성전자주식회사 복수의 프로세서를 포함하는 메모리 시스템
TWI426519B (zh) * 2009-12-29 2014-02-11 Winbond Electronics Corp 記憶體晶片以及其控制方法
US8839057B2 (en) * 2011-02-03 2014-09-16 Arm Limited Integrated circuit and method for testing memory on the integrated circuit
US9508437B2 (en) * 2014-01-30 2016-11-29 Sandisk Technologies Llc Pattern breaking in multi-die write management
US9281080B2 (en) * 2014-03-11 2016-03-08 Advantest Corporation Staged buffer caching in a system for testing a device under test
US9690482B2 (en) * 2014-11-03 2017-06-27 Arm Limited Data storage organisation technique
US10810525B1 (en) 2015-05-07 2020-10-20 CSC Holdings, LLC System and method for task-specific GPS-enabled network fault annunciator
US9960951B1 (en) 2016-03-15 2018-05-01 CSC Holdings, LLC System, method, and medium for determining a failure of a network element
CN110161977B (zh) * 2018-02-13 2022-04-12 京元电子股份有限公司 测量系统及其测量方法
CN114566205B (zh) * 2022-03-02 2024-06-21 长鑫存储技术有限公司 存储芯片的测试方法、装置、存储介质与电子设备
US12321249B2 (en) * 2022-11-10 2025-06-03 Intelligent Memory Limited Systems and methods for reducing error log required space in semiconductor testing
US12374417B2 (en) 2022-11-10 2025-07-29 Intelligent Memory Limited Apparatus, systems, and methods for dynamically reconfigured semiconductor tester for volatile and non-volatile memories
US12099424B2 (en) 2022-11-10 2024-09-24 Intelligent Memory Limited Apparatus, systems, and methods for dynamically reconfigured semiconductor tester for volatile and non-volatile memories

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1996020479A1 (en) 1994-12-23 1996-07-04 Micron Technology, Inc. Burst edo memory device address counter
JPH0916469A (ja) * 1995-04-27 1997-01-17 Hitachi Ltd 同期式ｄｒａｍからなるメモリに適したアドレス割り付けとアドレスロック機能を有するプロセッサシステム
JPH0917197A (ja) * 1995-06-30 1997-01-17 Advantest Corp 半導体メモリ試験方法およびこの方法を実施する装置
JPH1055694A (ja) 1996-08-09 1998-02-24 Advantest Corp メモリ試験装置
JPH10269799A (ja) 1997-03-19 1998-10-09 Advantest Corp 半導体メモリ試験装置
US5905909A (en) 1994-04-15 1999-05-18 Micron Technology, Inc. Memory device having circuitry for initializing and reprogramming a control operation feature
KR20000033120A (ko) * 1998-11-19 2000-06-15 윤종용 반도체 메모리 장치를 위한 프로그램 가능한 내장 자기 테스트시스템

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04119600A (ja) * 1990-09-10 1992-04-21 Mitsubishi Electric Corp テストモード機能内蔵ダイナミックランダムアクセスメモリ装置
TW338106B (en) * 1996-03-29 1998-08-11 Adoban Test Kk Semiconductor memory testing apparatus

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5905909A (en) 1994-04-15 1999-05-18 Micron Technology, Inc. Memory device having circuitry for initializing and reprogramming a control operation feature
WO1996020479A1 (en) 1994-12-23 1996-07-04 Micron Technology, Inc. Burst edo memory device address counter
JPH0916469A (ja) * 1995-04-27 1997-01-17 Hitachi Ltd 同期式ｄｒａｍからなるメモリに適したアドレス割り付けとアドレスロック機能を有するプロセッサシステム
JPH0917197A (ja) * 1995-06-30 1997-01-17 Advantest Corp 半導体メモリ試験方法およびこの方法を実施する装置
JPH1055694A (ja) 1996-08-09 1998-02-24 Advantest Corp メモリ試験装置
JPH10269799A (ja) 1997-03-19 1998-10-09 Advantest Corp 半導体メモリ試験装置
KR20000033120A (ko) * 1998-11-19 2000-06-15 윤종용 반도체 메모리 장치를 위한 프로그램 가능한 내장 자기 테스트시스템

Also Published As

Publication number Publication date
US6320812B1 (en) 2001-11-20
EP1193716B1 (en) 2005-06-08
EP1193716A1 (en) 2002-04-03
TW559821B (en) 2003-11-01
DE60111324D1 (de) 2005-07-14
DE60111324T2 (de) 2006-05-18
JP2002189632A (ja) 2002-07-05
KR20020022618A (ko) 2002-03-27

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