KR100769557B1 - 데이터 처리 시스템 및 데이터 처리 유닛 - Google Patents

데이터 처리 시스템 및 데이터 처리 유닛 Download PDF

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Publication number
KR100769557B1
KR100769557B1 KR1020017009221A KR20017009221A KR100769557B1 KR 100769557 B1 KR100769557 B1 KR 100769557B1 KR 1020017009221 A KR1020017009221 A KR 1020017009221A KR 20017009221 A KR20017009221 A KR 20017009221A KR 100769557 B1 KR100769557 B1 KR 100769557B1
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South Korea
Prior art keywords
data processing
processing unit
memory
power mode
access
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Expired - Fee Related
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KR1020017009221A
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English (en)
Korean (ko)
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KR20020007294A (ko
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에몬스마르틴제이엘
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엔엑스피 비 브이
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Assigned to 디에스피 그룹 스위쯜랜드 아게 reassignment 디에스피 그룹 스위쯜랜드 아게 권리의 전부이전등록 Assignors: 엔엑스피 비 브이
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0888—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using selective caching, e.g. bypass
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3265—Power saving in display device
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/325—Power saving in peripheral device
    • G06F1/3275—Power saving in memory, e.g. RAM, cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/084—Multiuser, multiprocessor or multiprocessing cache systems with a shared cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1028—Power efficiency
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Power Sources (AREA)
KR1020017009221A 1999-11-24 2000-11-15 데이터 처리 시스템 및 데이터 처리 유닛 Expired - Fee Related KR100769557B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP99203936 1999-11-24
EP99203936.2 1999-11-24

Publications (2)

Publication Number Publication Date
KR20020007294A KR20020007294A (ko) 2002-01-26
KR100769557B1 true KR100769557B1 (ko) 2007-10-23

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KR1020017009221A Expired - Fee Related KR100769557B1 (ko) 1999-11-24 2000-11-15 데이터 처리 시스템 및 데이터 처리 유닛

Country Status (6)

Country Link
US (1) US6963987B1 (enExample)
EP (1) EP1157370B1 (enExample)
JP (1) JP2003515831A (enExample)
KR (1) KR100769557B1 (enExample)
CN (1) CN1188795C (enExample)
WO (1) WO2001039164A1 (enExample)

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US7230933B2 (en) * 2002-04-17 2007-06-12 Microsoft Corporation Reducing idle power consumption in a networked battery operated device
JP4180834B2 (ja) * 2002-05-01 2008-11-12 富士通株式会社 情報処理装置および情報処理プログラム
EP1554647A1 (en) * 2002-10-11 2005-07-20 Koninklijke Philips Electronics N.V. Vliw processor with power saving
TWI242970B (en) * 2004-04-02 2005-11-01 Htc Corp Frame refreshing method and handheld electronic device using the method
DE102005016830A1 (de) * 2004-04-14 2005-11-03 Denso Corp., Kariya Halbleitervorrichtung und Verfahren zu ihrer Herstellung
EP1626328A1 (en) * 2004-08-13 2006-02-15 Dialog Semiconductor GmbH Power saving during idle loop
EP1640966B1 (en) * 2004-09-23 2012-09-19 HTC Corporation Frame refresh method and circuit
US7222253B2 (en) 2004-12-28 2007-05-22 Intel Corporation Dynamic power control for reducing voltage level of graphics controller component of memory controller based on its degree of idleness
US7373537B2 (en) * 2005-06-28 2008-05-13 Intel Corporation Response to wake event while a system is in reduced power consumption state
US7958312B2 (en) 2005-11-15 2011-06-07 Oracle America, Inc. Small and power-efficient cache that can provide data for background DMA devices while the processor is in a low-power state
US7934054B1 (en) 2005-11-15 2011-04-26 Oracle America, Inc. Re-fetching cache memory enabling alternative operational modes
US7873788B1 (en) 2005-11-15 2011-01-18 Oracle America, Inc. Re-fetching cache memory having coherent re-fetching
US7899990B2 (en) 2005-11-15 2011-03-01 Oracle America, Inc. Power conservation via DRAM access
US7516274B2 (en) 2005-11-15 2009-04-07 Sun Microsystems, Inc. Power conservation via DRAM access reduction
ATE548696T1 (de) * 2005-11-15 2012-03-15 Oracle America Inc Energieeinsparung über dram-zugang
CN101356511B (zh) * 2005-11-15 2012-01-11 太阳微系统有限公司 通过dram存取的功率转换
US7536511B2 (en) * 2006-07-07 2009-05-19 Advanced Micro Devices, Inc. CPU mode-based cache allocation for image data
KR101330121B1 (ko) * 2006-10-30 2013-11-26 삼성전자주식회사 컴퓨터시스템 및 그 제어방법
US8041848B2 (en) 2008-08-04 2011-10-18 Apple Inc. Media processing method and device
US9128842B2 (en) * 2012-09-28 2015-09-08 Intel Corporation Apparatus and method for reducing the flushing time of a cache

Citations (1)

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US5809314A (en) * 1994-12-23 1998-09-15 Intel Corporation Method of monitoring system bus traffic by a CPU operating with reduced power

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US5450549A (en) * 1992-04-09 1995-09-12 International Business Machines Corporation Multi-channel image array buffer and switching network
JPH06215160A (ja) * 1992-08-25 1994-08-05 Texas Instr Inc <Ti> データ処理方法および装置
US5638530A (en) * 1993-04-20 1997-06-10 Texas Instruments Incorporated Direct memory access scheme using memory with an integrated processor having communication with external devices
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US5809314A (en) * 1994-12-23 1998-09-15 Intel Corporation Method of monitoring system bus traffic by a CPU operating with reduced power

Also Published As

Publication number Publication date
JP2003515831A (ja) 2003-05-07
US6963987B1 (en) 2005-11-08
CN1188795C (zh) 2005-02-09
CN1344403A (zh) 2002-04-10
WO2001039164A1 (en) 2001-05-31
EP1157370A1 (en) 2001-11-28
EP1157370B1 (en) 2014-09-03
KR20020007294A (ko) 2002-01-26

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