KR100765011B1 - 반도체 집적 회로 장치 - Google Patents

반도체 집적 회로 장치 Download PDF

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Publication number
KR100765011B1
KR100765011B1 KR1020060095872A KR20060095872A KR100765011B1 KR 100765011 B1 KR100765011 B1 KR 100765011B1 KR 1020060095872 A KR1020060095872 A KR 1020060095872A KR 20060095872 A KR20060095872 A KR 20060095872A KR 100765011 B1 KR100765011 B1 KR 100765011B1
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KR
South Korea
Prior art keywords
memory cell
data
write
transfer gate
voltage
Prior art date
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Expired - Fee Related
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KR1020060095872A
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English (en)
Korean (ko)
Other versions
KR20070037403A (ko
Inventor
겐 다께우찌
도모하루 다나까
Original Assignee
가부시끼가이샤 도시바
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Publication of KR20070037403A publication Critical patent/KR20070037403A/ko
Application granted granted Critical
Publication of KR100765011B1 publication Critical patent/KR100765011B1/ko
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/002—Isolation gates, i.e. gates coupling bit lines to the sense amplifier
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5621—Multilevel programming verification

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
KR1020060095872A 2005-09-30 2006-09-29 반도체 집적 회로 장치 Expired - Fee Related KR100765011B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2005-00288566 2005-09-30
JP2005288566A JP2007102848A (ja) 2005-09-30 2005-09-30 半導体集積回路装置

Publications (2)

Publication Number Publication Date
KR20070037403A KR20070037403A (ko) 2007-04-04
KR100765011B1 true KR100765011B1 (ko) 2007-10-09

Family

ID=37901743

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020060095872A Expired - Fee Related KR100765011B1 (ko) 2005-09-30 2006-09-29 반도체 집적 회로 장치

Country Status (3)

Country Link
US (1) US20070076494A1 (cg-RX-API-DMAC10.html)
JP (1) JP2007102848A (cg-RX-API-DMAC10.html)
KR (1) KR100765011B1 (cg-RX-API-DMAC10.html)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7274594B2 (en) 2005-04-11 2007-09-25 Stmicroelectronics S.R.L. Non-volatile memory electronic device with NAND structure being monolithically integrated on semiconductor
US7977186B2 (en) * 2006-09-28 2011-07-12 Sandisk Corporation Providing local boosting control implant for non-volatile memory
US7705387B2 (en) * 2006-09-28 2010-04-27 Sandisk Corporation Non-volatile memory with local boosting control implant
US7940572B2 (en) * 2008-01-07 2011-05-10 Mosaid Technologies Incorporated NAND flash memory having multiple cell substrates
JP5814867B2 (ja) 2012-06-27 2015-11-17 株式会社東芝 半導体記憶装置
JP2014026705A (ja) * 2012-07-27 2014-02-06 Toshiba Corp 不揮発性半導体記憶装置およびその使用方法
KR102526621B1 (ko) * 2018-04-23 2023-04-28 에스케이하이닉스 주식회사 비휘발성 메모리 장치 및 이의 동작 방법

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2644426B2 (ja) * 1993-04-12 1997-08-25 株式会社東芝 不揮発性半導体記憶装置
KR100253868B1 (ko) * 1995-11-13 2000-05-01 니시무로 타이죠 불휘발성 반도체기억장치
JP2838993B2 (ja) * 1995-11-29 1998-12-16 日本電気株式会社 不揮発性半導体記憶装置
JPH10177797A (ja) * 1996-12-17 1998-06-30 Toshiba Corp 半導体記憶装置
KR19990029775A (ko) * 1997-09-11 1999-04-26 오카모토 세이시 불휘발성 반도체 기억 장치
JP3886673B2 (ja) * 1999-08-06 2007-02-28 株式会社東芝 不揮発性半導体記憶装置
JP3863330B2 (ja) * 1999-09-28 2006-12-27 株式会社東芝 不揮発性半導体メモリ
JP4723714B2 (ja) * 2000-10-04 2011-07-13 株式会社東芝 半導体集積回路装置およびその検査方法
JP4250325B2 (ja) * 2000-11-01 2009-04-08 株式会社東芝 半導体記憶装置
JP4270832B2 (ja) * 2002-09-26 2009-06-03 株式会社東芝 不揮発性半導体メモリ
JP3875621B2 (ja) * 2002-10-30 2007-01-31 株式会社東芝 不揮発性半導体記憶装置
JP4156986B2 (ja) * 2003-06-30 2008-09-24 株式会社東芝 不揮発性半導体記憶装置
US7050346B2 (en) * 2003-07-29 2006-05-23 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and electric device with the same
KR100537199B1 (ko) * 2004-05-06 2005-12-16 주식회사 하이닉스반도체 동기식 메모리 소자
JP4817615B2 (ja) * 2004-05-31 2011-11-16 株式会社東芝 不揮発性半導体記憶装置
JP4455262B2 (ja) * 2004-10-14 2010-04-21 株式会社東芝 半導体装置
JP4786171B2 (ja) * 2004-12-10 2011-10-05 株式会社東芝 半導体記憶装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
US06678191, US06847087

Also Published As

Publication number Publication date
KR20070037403A (ko) 2007-04-04
US20070076494A1 (en) 2007-04-05
JP2007102848A (ja) 2007-04-19

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