KR100669351B1 - 멀티 레벨 셀 플래시 메모리의 프로그램 방법 및 장치 - Google Patents

멀티 레벨 셀 플래시 메모리의 프로그램 방법 및 장치 Download PDF

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Publication number
KR100669351B1
KR100669351B1 KR1020050069566A KR20050069566A KR100669351B1 KR 100669351 B1 KR100669351 B1 KR 100669351B1 KR 1020050069566 A KR1020050069566 A KR 1020050069566A KR 20050069566 A KR20050069566 A KR 20050069566A KR 100669351 B1 KR100669351 B1 KR 100669351B1
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KR
South Korea
Prior art keywords
bit
program
state
memory cell
programmed
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KR1020050069566A
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English (en)
Korean (ko)
Inventor
공재필
정재용
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삼성전자주식회사
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Priority to KR1020050069566A priority Critical patent/KR100669351B1/ko
Priority to US11/453,991 priority patent/US7447067B2/en
Priority to CN2006101100229A priority patent/CN1905069B/zh
Application granted granted Critical
Publication of KR100669351B1 publication Critical patent/KR100669351B1/ko

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/102External programming circuits, e.g. EPROM programmers; In-circuit programming or reprogramming; EPROM emulators
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628Programming or writing circuits; Data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2211/00Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562Multilevel memory programming aspects
    • G11C2211/5621Multilevel programming verification
KR1020050069566A 2005-07-29 2005-07-29 멀티 레벨 셀 플래시 메모리의 프로그램 방법 및 장치 KR100669351B1 (ko)

Priority Applications (3)

Application Number Priority Date Filing Date Title
KR1020050069566A KR100669351B1 (ko) 2005-07-29 2005-07-29 멀티 레벨 셀 플래시 메모리의 프로그램 방법 및 장치
US11/453,991 US7447067B2 (en) 2005-07-29 2006-06-16 Method and apparatus for programming multi level cell flash memory device
CN2006101100229A CN1905069B (zh) 2005-07-29 2006-07-28 将多级单元快闪存储设备编程的方法和装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050069566A KR100669351B1 (ko) 2005-07-29 2005-07-29 멀티 레벨 셀 플래시 메모리의 프로그램 방법 및 장치

Publications (1)

Publication Number Publication Date
KR100669351B1 true KR100669351B1 (ko) 2007-01-16

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KR1020050069566A KR100669351B1 (ko) 2005-07-29 2005-07-29 멀티 레벨 셀 플래시 메모리의 프로그램 방법 및 장치

Country Status (3)

Country Link
US (1) US7447067B2 (zh)
KR (1) KR100669351B1 (zh)
CN (1) CN1905069B (zh)

Cited By (1)

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KR101391881B1 (ko) 2007-10-23 2014-05-07 삼성전자주식회사 멀티-비트 플래시 메모리 장치 및 그것의 프로그램 및 읽기방법

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US7580292B2 (en) * 2007-06-14 2009-08-25 Macronix International Co., Ltd. Method for programming a multilevel memory
US7489543B1 (en) * 2007-07-25 2009-02-10 Micron Technology, Inc. Programming multilevel cell memory arrays
JP2009104729A (ja) * 2007-10-24 2009-05-14 Toshiba Corp 不揮発性半導体記憶装置
KR101515098B1 (ko) * 2008-11-20 2015-04-24 삼성전자주식회사 플래시 메모리 장치 및 이의 독출 방법
WO2010076835A1 (en) 2008-12-31 2010-07-08 Christophe Laurent Error correction code for unidirectional memory
US8238166B2 (en) * 2009-10-12 2012-08-07 Macronix International Co., Ltd. Methods of programming and reading single-level trapped-charge memory cells using second-bit threshold detection
KR101798013B1 (ko) * 2010-12-30 2017-11-16 삼성전자주식회사 비휘발성 메모리 장치의 프로그램 방법
CN103019616B (zh) * 2012-11-23 2015-11-25 记忆科技(深圳)有限公司 一种固态硬盘及闪存芯片的充放电控制方法
CN105895156B (zh) * 2016-03-30 2019-09-20 深圳忆联信息系统有限公司 一种信息处理方法及电子设备
JP2017224370A (ja) * 2016-06-15 2017-12-21 東芝メモリ株式会社 半導体記憶装置及びメモリシステム
US10095424B2 (en) 2016-08-04 2018-10-09 Intel Corporation Apparatus and method for programming non-volatile memory using a multi-cell storage cell group
US10043573B2 (en) 2016-08-04 2018-08-07 Intel Corporation Apparatus and method for endurance friendly programming using lower voltage thresholds
US10083742B2 (en) 2016-09-26 2018-09-25 Intel Corporation Method and apparatus for programming non-volatile memory using a multi-cell storage cell group to provide error location information for retention errors
KR102649347B1 (ko) * 2016-10-11 2024-03-20 삼성전자주식회사 불휘발성 메모리 장치를 프로그램하는 방법과, 상기 메모리 장치를 포함하는 시스템의 작동 방법
CN109522237B (zh) * 2017-09-20 2023-12-29 旺宏电子股份有限公司 存储器的数据管理方法及存储器装置

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JPH11185491A (ja) 1997-12-24 1999-07-09 Sony Corp 半導体不揮発性記憶装置
KR20050007653A (ko) * 2003-07-11 2005-01-21 삼성전자주식회사 멀티 레벨 셀을 갖는 플래시 메모리 장치와 그것의 독출방법 및 프로그램 방법
KR20050094569A (ko) * 2004-03-23 2005-09-28 주식회사 하이닉스반도체 멀티 레벨 낸드 플래시 메모리 셀의 독출 방법 및 회로

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KR100244864B1 (ko) * 1996-03-18 2000-03-02 니시무로 타이죠 불휘발성 반도체 기억 장치
JP3159105B2 (ja) 1997-02-21 2001-04-23 日本電気株式会社 不揮発性半導体記憶装置及びその書込方法
JP2001093288A (ja) 1999-09-20 2001-04-06 Toshiba Corp 不揮発性半導体記憶装置
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KR100390959B1 (ko) 2001-06-29 2003-07-12 주식회사 하이닉스반도체 센싱회로를 이용한 멀티레벨 플래시 메모리 프로그램/리드방법
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JP4410188B2 (ja) 2004-11-12 2010-02-03 株式会社東芝 半導体記憶装置のデータ書き込み方法
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US7224614B1 (en) * 2005-12-29 2007-05-29 Sandisk Corporation Methods for improved program-verify operations in non-volatile memories

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Publication number Priority date Publication date Assignee Title
JPH11185491A (ja) 1997-12-24 1999-07-09 Sony Corp 半導体不揮発性記憶装置
KR20050007653A (ko) * 2003-07-11 2005-01-21 삼성전자주식회사 멀티 레벨 셀을 갖는 플래시 메모리 장치와 그것의 독출방법 및 프로그램 방법
KR20050094569A (ko) * 2004-03-23 2005-09-28 주식회사 하이닉스반도체 멀티 레벨 낸드 플래시 메모리 셀의 독출 방법 및 회로

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101391881B1 (ko) 2007-10-23 2014-05-07 삼성전자주식회사 멀티-비트 플래시 메모리 장치 및 그것의 프로그램 및 읽기방법

Also Published As

Publication number Publication date
CN1905069A (zh) 2007-01-31
CN1905069B (zh) 2011-07-13
US7447067B2 (en) 2008-11-04
US20070035994A1 (en) 2007-02-15

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