KR100402041B1 - 반도체 기억 장치 - Google Patents

반도체 기억 장치 Download PDF

Info

Publication number
KR100402041B1
KR100402041B1 KR10-2000-0070644A KR20000070644A KR100402041B1 KR 100402041 B1 KR100402041 B1 KR 100402041B1 KR 20000070644 A KR20000070644 A KR 20000070644A KR 100402041 B1 KR100402041 B1 KR 100402041B1
Authority
KR
South Korea
Prior art keywords
signal
address
lines
line
row
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR10-2000-0070644A
Other languages
English (en)
Korean (ko)
Other versions
KR20010070239A (ko
Inventor
스즈끼요이찌
미시마아끼히로
고사까이미쯔히꼬
세가와마꼬또
나루께야스오
Original Assignee
가부시끼가이샤 도시바
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가부시끼가이샤 도시바 filed Critical 가부시끼가이샤 도시바
Publication of KR20010070239A publication Critical patent/KR20010070239A/ko
Application granted granted Critical
Publication of KR100402041B1 publication Critical patent/KR100402041B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Static Random-Access Memory (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
KR10-2000-0070644A 1999-11-25 2000-11-25 반도체 기억 장치 Expired - Fee Related KR100402041B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP1999-334971 1999-11-25
JP33497199 1999-11-25
JP2000287191A JP2001216799A (ja) 1999-11-25 2000-09-21 半導体記憶装置
JP2000-287191 2000-09-21

Publications (2)

Publication Number Publication Date
KR20010070239A KR20010070239A (ko) 2001-07-25
KR100402041B1 true KR100402041B1 (ko) 2003-10-17

Family

ID=36586041

Family Applications (1)

Application Number Title Priority Date Filing Date
KR10-2000-0070644A Expired - Fee Related KR100402041B1 (ko) 1999-11-25 2000-11-25 반도체 기억 장치

Country Status (4)

Country Link
US (1) US6529438B1 (enExample)
JP (1) JP2001216799A (enExample)
KR (1) KR100402041B1 (enExample)
TW (1) TW518746B (enExample)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4782937B2 (ja) * 2001-03-27 2011-09-28 株式会社東芝 半導体記憶装置
JP3644913B2 (ja) * 2001-07-23 2005-05-11 松下電器産業株式会社 半導体装置
KR20030030165A (ko) * 2001-10-09 2003-04-18 동부전자 주식회사 메모리 디바이스의 전원 불량 테스트 장치
US6813579B1 (en) * 2001-12-14 2004-11-02 Cirrus Logic, Inc. Apparatus and method for test mode control
KR100442148B1 (ko) * 2002-08-09 2004-07-27 동부전자 주식회사 반도체 장비에서의 누전 셀 검출장치
US7188263B1 (en) * 2003-05-07 2007-03-06 Nvidia Corporation Method and apparatus for controlling power state of a multi-lane serial bus link having a plurality of state transition detectors wherein powering down all the state transition detectors except one
KR100505711B1 (ko) * 2003-09-30 2005-08-03 삼성전자주식회사 칼럼 선택 신호 제어 방법 및 칼럼 선택 신호 제어 회로
US7369452B2 (en) * 2006-04-07 2008-05-06 Freescale Semiconductor, Inc. Programmable cell
JP2009266317A (ja) * 2008-04-25 2009-11-12 Elpida Memory Inc 半導体記憶装置、およびデータ縮約テスト方法
KR101539297B1 (ko) 2009-01-05 2015-07-24 삼성전자주식회사 반도체 장치, 이를 포함하는 반도체 시스템, 및 반도체 장치의 전압 공급방법
JP2011134386A (ja) * 2009-12-24 2011-07-07 Elpida Memory Inc 半導体装置
WO2013179593A1 (ja) * 2012-05-29 2013-12-05 パナソニック株式会社 半導体記憶装置および半導体記憶装置を搭載した半導体装置
KR102651706B1 (ko) * 2017-01-09 2024-03-28 에스케이하이닉스 주식회사 라인 결함 검출 회로 및 그를 포함하는 반도체 메모리 장치

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1145598A (ja) * 1997-07-25 1999-02-16 Nec Corp 半導体記憶装置
JPH11154400A (ja) * 1997-11-21 1999-06-08 Toshiba Corp 半導体記憶装置およびそのテスト方法
JP3309822B2 (ja) * 1999-01-12 2002-07-29 日本電気株式会社 半導体記憶装置及びその試験方法

Also Published As

Publication number Publication date
US6529438B1 (en) 2003-03-04
TW518746B (en) 2003-01-21
KR20010070239A (ko) 2001-07-25
JP2001216799A (ja) 2001-08-10

Similar Documents

Publication Publication Date Title
KR0158484B1 (ko) 불휘발성 반도체 메모리의 행리던던씨
US5146429A (en) Semiconductor memory device including a redundancy circuitry for repairing a defective memory cell and a method for repairing a defective memory cell
US4556975A (en) Programmable redundancy circuit
US4672240A (en) Programmable redundancy circuit
US5388076A (en) Semiconductor memory device
JP2629645B2 (ja) 半導体記憶装置
KR0177740B1 (ko) 반도체 메모리 장치의 리던던시 회로 및 그 방법
US5485424A (en) Semiconductor memory and redundant-address writing method
KR100402041B1 (ko) 반도체 기억 장치
KR0161343B1 (ko) 용장메모리셀을 가지는 반도체기억장치
KR940024595A (ko) 용장에 의한 기억장치의 복구를 위한 개량된 방법 및 장치
JPH0358399A (ja) 半導体記憶装置
US5703816A (en) Failed memory cell repair circuit of semiconductor memory
US7218558B2 (en) Semiconductor memory devices having column redundancy circuits therein that support multiple memory blocks
US5706231A (en) Semiconductor memory device having a redundant memory cell
US6178127B1 (en) Semiconductor memory device allowing reliable repairing of a defective column
US7286419B2 (en) Semiconductor memory device outputting identifying and roll call information
US6731561B2 (en) Semiconductor memory and method of testing semiconductor memory
US6269033B1 (en) Semiconductor memory device having redundancy unit for data line compensation
US5923672A (en) Multipath antifuse circuit
US7095642B1 (en) Method and circuit for reducing defect current from array element failures in random access memories
US6188239B1 (en) Semiconductor programmable test arrangement such as an antifuse to ID circuit having common access switches and/or common programming switches
KR100390146B1 (ko) 번-인 테스트 기능을 구비한 반도체 메모리 장치
US6934202B2 (en) Memory circuit with dynamic redundancy
KR100246182B1 (ko) 메모리 셀 리페어 회로

Legal Events

Date Code Title Description
A201 Request for examination
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

T11-X000 Administrative time limit extension requested

St.27 status event code: U-3-3-T10-T11-oth-X000

E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PN2301 Change of applicant

St.27 status event code: A-5-5-R10-R11-asn-PN2301

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

R17-X000 Change to representative recorded

St.27 status event code: A-5-5-R10-R17-oth-X000

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 8

FPAY Annual fee payment

Payment date: 20110920

Year of fee payment: 9

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 9

FPAY Annual fee payment

Payment date: 20120924

Year of fee payment: 10

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 10

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20131003

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20131003

R18 Changes to party contact information recorded

Free format text: ST27 STATUS EVENT CODE: A-5-5-R10-R18-OTH-X000 (AS PROVIDED BY THE NATIONAL OFFICE)

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000