KR100311058B1 - 반도체디바이스형성방법 - Google Patents

반도체디바이스형성방법 Download PDF

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Publication number
KR100311058B1
KR100311058B1 KR1019930011550A KR930011550A KR100311058B1 KR 100311058 B1 KR100311058 B1 KR 100311058B1 KR 1019930011550 A KR1019930011550 A KR 1019930011550A KR 930011550 A KR930011550 A KR 930011550A KR 100311058 B1 KR100311058 B1 KR 100311058B1
Authority
KR
South Korea
Prior art keywords
conductive layer
patterned
insulating layer
layer
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
KR1019930011550A
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English (en)
Korean (ko)
Other versions
KR940001358A (ko
Inventor
산칭팡
나디아리프셔츠
Original Assignee
에이티 앤드 티 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 에이티 앤드 티 코포레이션 filed Critical 에이티 앤드 티 코포레이션
Publication of KR940001358A publication Critical patent/KR940001358A/ko
Application granted granted Critical
Publication of KR100311058B1 publication Critical patent/KR100311058B1/ko
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/069—Manufacture or treatment of conductive parts of the interconnections by forming self-aligned vias or self-aligned contact plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/26—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials
    • H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
    • H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
    • H10P50/267—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Memories (AREA)
KR1019930011550A 1992-06-24 1993-06-23 반도체디바이스형성방법 Expired - Lifetime KR100311058B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US90368492A 1992-06-24 1992-06-24
US903,684 1992-06-24

Publications (2)

Publication Number Publication Date
KR940001358A KR940001358A (ko) 1994-01-11
KR100311058B1 true KR100311058B1 (ko) 2003-05-09

Family

ID=25417919

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930011550A Expired - Lifetime KR100311058B1 (ko) 1992-06-24 1993-06-23 반도체디바이스형성방법

Country Status (5)

Country Link
US (1) US5407532A (https=)
EP (1) EP0580290A1 (https=)
JP (1) JPH0684898A (https=)
KR (1) KR100311058B1 (https=)
TW (1) TW219407B (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06302599A (ja) * 1993-04-13 1994-10-28 Toshiba Corp 半導体装置およびその製造方法
US5639688A (en) * 1993-05-21 1997-06-17 Harris Corporation Method of making integrated circuit structure with narrow line widths
JP2951215B2 (ja) * 1993-09-10 1999-09-20 レイセオン・カンパニー 位相マスクレーザによる微細なパターンの電子相互接続構造の製造方法
US5656543A (en) * 1995-02-03 1997-08-12 National Semiconductor Corporation Fabrication of integrated circuits with borderless vias
US5757077A (en) * 1995-02-03 1998-05-26 National Semiconductor Corporation Integrated circuits with borderless vias
US5858875A (en) * 1995-02-03 1999-01-12 National Semiconductor Corporation Integrated circuits with borderless vias
US5998256A (en) * 1996-11-01 1999-12-07 Micron Technology, Inc. Semiconductor processing methods of forming devices on a substrate, forming device arrays on a substrate, forming conductive lines on a substrate, and forming capacitor arrays on a substrate, and integrated circuitry
US6037253A (en) * 1997-01-27 2000-03-14 Chartered Semiconductor Manufacturing Company, Ltd. Method for increasing interconnect packing density in integrated circuits
US6590250B2 (en) 1997-11-25 2003-07-08 Micron Technology, Inc. DRAM capacitor array and integrated device array of substantially identically shaped devices

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03120838A (ja) * 1989-10-04 1991-05-23 Sony Corp 半導体装置の製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4234362A (en) * 1978-11-03 1980-11-18 International Business Machines Corporation Method for forming an insulator between layers of conductive material
NL7907434A (nl) * 1979-10-08 1981-04-10 Philips Nv Werkwijze voor het vervaardigen van een halfgeleider- inrichting.
US4826781A (en) * 1986-03-04 1989-05-02 Seiko Epson Corporation Semiconductor device and method of preparation
GB2220298A (en) * 1988-06-29 1990-01-04 Philips Nv A method of manufacturing a semiconductor device
US5030587A (en) * 1990-06-05 1991-07-09 Micron Technology, Inc. Method of forming substantially planar digit lines
KR920003461A (ko) * 1990-07-30 1992-02-29 김광호 접촉영역 형성방법 및 그를 이용한 반도체장치의 제조방법
DE69026503T2 (de) * 1990-07-31 1996-11-14 Ibm Verfahren zur Herstellung von Bauelementen mit übereinander angeordneten selbstjustierten Feldeffekttransistoren aus Polisilizium und sich daraus ergebende Struktur
US5100838A (en) * 1990-10-04 1992-03-31 Micron Technology, Inc. Method for forming self-aligned conducting pillars in an (IC) fabrication process
KR930006128B1 (ko) * 1991-01-31 1993-07-07 삼성전자 주식회사 반도체장치의 금속 배선 형성방법
US5084406A (en) * 1991-07-01 1992-01-28 Micron Technology, Inc. Method for forming low resistance DRAM digit-line
US5270240A (en) * 1991-07-10 1993-12-14 Micron Semiconductor, Inc. Four poly EPROM process and structure comprising a conductive source line structure and self-aligned polycrystalline silicon digit lines
US5170243A (en) * 1991-11-04 1992-12-08 International Business Machines Corporation Bit line configuration for semiconductor memory
US5158898A (en) * 1991-11-19 1992-10-27 Motorola, Inc. Self-aligned under-gated thin film transistor and method of formation

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03120838A (ja) * 1989-10-04 1991-05-23 Sony Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
KR940001358A (ko) 1994-01-11
US5407532A (en) 1995-04-18
TW219407B (https=) 1994-01-21
JPH0684898A (ja) 1994-03-25
EP0580290A1 (en) 1994-01-26

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