KR100212096B1 - 반도체기억장치 - Google Patents
반도체기억장치 Download PDFInfo
- Publication number
- KR100212096B1 KR100212096B1 KR1019910017597A KR910017597A KR100212096B1 KR 100212096 B1 KR100212096 B1 KR 100212096B1 KR 1019910017597 A KR1019910017597 A KR 1019910017597A KR 910017597 A KR910017597 A KR 910017597A KR 100212096 B1 KR100212096 B1 KR 100212096B1
- Authority
- KR
- South Korea
- Prior art keywords
- data line
- signal
- semiconductor memory
- memory device
- information
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27039890A JP3350045B2 (ja) | 1990-10-11 | 1990-10-11 | 半導体記憶装置 |
JP90-270398 | 1990-10-11 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920008753A KR920008753A (ko) | 1992-05-28 |
KR100212096B1 true KR100212096B1 (ko) | 1999-08-02 |
Family
ID=17485709
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910017597A KR100212096B1 (ko) | 1990-10-11 | 1991-10-08 | 반도체기억장치 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5309393A (ja) |
JP (1) | JP3350045B2 (ja) |
KR (1) | KR100212096B1 (ja) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5625602A (en) * | 1991-11-18 | 1997-04-29 | Kabushiki Kaisha Toshiba | NAND-type dynamic RAM having temporary storage register and sense amplifier coupled to multi-open bit lines |
US5539612A (en) * | 1992-09-08 | 1996-07-23 | Texas Instruments Incorporated | Intermediate structure for forming a storage capacitor |
JP3154843B2 (ja) * | 1992-11-26 | 2001-04-09 | 株式会社東芝 | 半導体記憶装置 |
KR950012731A (ko) * | 1993-10-25 | 1995-05-16 | 사토 후미오 | 반도체기억장치 및 그 제조방법 |
US5717625A (en) * | 1993-12-27 | 1998-02-10 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
JP3272888B2 (ja) * | 1993-12-28 | 2002-04-08 | 株式会社東芝 | 半導体記憶装置 |
US5546204A (en) * | 1994-05-26 | 1996-08-13 | Honeywell Inc. | TFT matrix liquid crystal device having data source lines and drain means of etched and doped single crystal silicon |
US5541870A (en) * | 1994-10-28 | 1996-07-30 | Symetrix Corporation | Ferroelectric memory and non-volatile memory cell for same |
JP3397499B2 (ja) * | 1994-12-12 | 2003-04-14 | 株式会社東芝 | 半導体記憶装置 |
DE19711998A1 (de) | 1997-03-13 | 1998-09-17 | Francotyp Postalia Gmbh | Postverarbeitungssystem mit einer über Personalcomputer gesteuerten druckenden Maschinen-Basisstation |
US5978282A (en) * | 1997-04-03 | 1999-11-02 | Texas Instruments Incorporated | Low power line system and method |
JP2000173269A (ja) * | 1998-12-08 | 2000-06-23 | Mitsubishi Electric Corp | 半導体記憶装置 |
WO2001073846A1 (en) | 2000-03-29 | 2001-10-04 | Hitachi, Ltd. | Semiconductor device |
US6515914B2 (en) * | 2001-03-21 | 2003-02-04 | Micron Technology, Inc. | Memory device and method having data path with multiple prefetch I/O configurations |
US7065546B2 (en) * | 2002-04-09 | 2006-06-20 | Sony Electronics Inc. | Method of performing quantization within a multimedia bitstream utilizing division-free instructions |
US6760266B2 (en) * | 2002-06-28 | 2004-07-06 | Freescale Semiconductor, Inc. | Sense amplifier and method for performing a read operation in a MRAM |
JP2004030849A (ja) * | 2002-06-28 | 2004-01-29 | Fujitsu Ltd | データの一部書き換え機能を有する半導体不揮発性メモリ |
US6677633B2 (en) | 2002-09-24 | 2004-01-13 | Hitachi, Ltd. | Semiconductor device |
US6982911B2 (en) * | 2004-03-18 | 2006-01-03 | Infineon Technologies Ag | Memory device with common row interface |
KR100819100B1 (ko) * | 2007-01-04 | 2008-04-03 | 삼성전자주식회사 | 반도체 메모리 장치에서의 데이터 라인 배치 구조 및 라인드라이빙 방법 |
US8341271B2 (en) * | 2008-06-30 | 2012-12-25 | Sibeam, Inc. | Device discovery in a wireless communication system |
US9264762B2 (en) * | 2008-06-30 | 2016-02-16 | Sibeam, Inc. | Dispatch capability using a single physical interface |
US20090327572A1 (en) * | 2008-06-30 | 2009-12-31 | In Sung Cho | Exchanging information between components coupled with an a i2c bus via separate banks |
US9531986B2 (en) * | 2008-06-30 | 2016-12-27 | Sibeam, Inc. | Bitmap device identification in a wireless communication system |
US20090327547A1 (en) * | 2008-06-30 | 2009-12-31 | In Sung Cho | I2c bus compatible with hdmi |
US8116333B2 (en) * | 2008-06-30 | 2012-02-14 | Sibeam, Inc. | Connection control in a wireless communication system |
JP6298657B2 (ja) * | 2013-03-07 | 2018-03-20 | 株式会社半導体エネルギー研究所 | 半導体装置 |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4648074A (en) * | 1984-06-29 | 1987-03-03 | Rca Corporation | Reference circuit with semiconductor memory array |
US4648073A (en) * | 1984-12-31 | 1987-03-03 | International Business Machines Corporation | Sequential shared access lines memory cells |
US4717261A (en) * | 1985-01-16 | 1988-01-05 | Casio Computer Co., Ltd. | Recording/reproducing apparatus including synthesized voice converter |
US4939690A (en) * | 1987-12-28 | 1990-07-03 | Kabushiki Kaisha Toshiba | Electrically erasable programmable read-only memory with NAND cell structure that suppresses memory cell threshold voltage variation |
US4996669A (en) * | 1989-03-08 | 1991-02-26 | Kabushiki Kaisha Toshiba | Electrically erasable programmable read-only memory with NAND memory cell structure |
-
1990
- 1990-10-11 JP JP27039890A patent/JP3350045B2/ja not_active Expired - Fee Related
-
1991
- 1991-10-08 KR KR1019910017597A patent/KR100212096B1/ko not_active IP Right Cessation
- 1991-10-11 US US07/774,834 patent/US5309393A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JP3350045B2 (ja) | 2002-11-25 |
US5309393A (en) | 1994-05-03 |
JPH04147490A (ja) | 1992-05-20 |
KR920008753A (ko) | 1992-05-28 |
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Legal Events
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A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
G170 | Publication of correction | ||
FPAY | Annual fee payment |
Payment date: 20020429 Year of fee payment: 4 |
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LAPS | Lapse due to unpaid annual fee |