JPWO2024190116A5 - - Google Patents
Info
- Publication number
- JPWO2024190116A5 JPWO2024190116A5 JP2025506537A JP2025506537A JPWO2024190116A5 JP WO2024190116 A5 JPWO2024190116 A5 JP WO2024190116A5 JP 2025506537 A JP2025506537 A JP 2025506537A JP 2025506537 A JP2025506537 A JP 2025506537A JP WO2024190116 A5 JPWO2024190116 A5 JP WO2024190116A5
- Authority
- JP
- Japan
- Prior art keywords
- insulating layer
- region
- oxide
- layer
- oxide semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2023041930 | 2023-03-16 | ||
| PCT/JP2024/002595 WO2024190116A1 (ja) | 2023-03-16 | 2024-01-29 | 半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2024190116A1 JPWO2024190116A1 (https=) | 2024-09-19 |
| JPWO2024190116A5 true JPWO2024190116A5 (https=) | 2025-12-01 |
Family
ID=92754751
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2025506537A Pending JPWO2024190116A1 (https=) | 2023-03-16 | 2024-01-29 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US20260006828A1 (https=) |
| JP (1) | JPWO2024190116A1 (https=) |
| CN (1) | CN120753017A (https=) |
| WO (1) | WO2024190116A1 (https=) |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4869509B2 (ja) * | 2001-07-17 | 2012-02-08 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP2007294491A (ja) * | 2006-04-20 | 2007-11-08 | Mitsubishi Electric Corp | 薄膜トランジスタ、及びその製造方法、並びに、アクティブマトリクス型表示装置及びその製造方法 |
| US8247273B2 (en) * | 2007-07-17 | 2012-08-21 | Sharp Kabushiki Kaisha | Semiconductor device provided with thin film transistor and method for manufacturing the semiconductor device |
| JP2009135448A (ja) * | 2007-11-01 | 2009-06-18 | Semiconductor Energy Lab Co Ltd | 半導体基板の作製方法及び半導体装置の作製方法 |
| JP2009123732A (ja) * | 2007-11-12 | 2009-06-04 | Seiko Epson Corp | 半導体装置の製造方法、電気光学装置の製造方法 |
| KR101806271B1 (ko) * | 2010-05-14 | 2017-12-07 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 제작 방법 |
| CN102760697B (zh) * | 2011-04-27 | 2016-08-03 | 株式会社半导体能源研究所 | 半导体装置的制造方法 |
| US9960280B2 (en) * | 2013-12-26 | 2018-05-01 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| JP2017107913A (ja) * | 2015-12-07 | 2017-06-15 | 株式会社ジャパンディスプレイ | 薄膜トランジスタ及び薄膜トランジスタの製造方法 |
| WO2019166906A1 (ja) * | 2018-02-28 | 2019-09-06 | 株式会社半導体エネルギー研究所 | 半導体装置、および半導体装置の作製方法 |
-
2024
- 2024-01-29 JP JP2025506537A patent/JPWO2024190116A1/ja active Pending
- 2024-01-29 CN CN202480014051.1A patent/CN120753017A/zh active Pending
- 2024-01-29 WO PCT/JP2024/002595 patent/WO2024190116A1/ja not_active Ceased
-
2025
- 2025-09-09 US US19/322,823 patent/US20260006828A1/en active Pending
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