JPWO2024071007A1 - - Google Patents

Info

Publication number
JPWO2024071007A1
JPWO2024071007A1 JP2024549351A JP2024549351A JPWO2024071007A1 JP WO2024071007 A1 JPWO2024071007 A1 JP WO2024071007A1 JP 2024549351 A JP2024549351 A JP 2024549351A JP 2024549351 A JP2024549351 A JP 2024549351A JP WO2024071007 A1 JPWO2024071007 A1 JP WO2024071007A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2024549351A
Other languages
Japanese (ja)
Other versions
JPWO2024071007A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2024071007A1 publication Critical patent/JPWO2024071007A1/ja
Publication of JPWO2024071007A5 publication Critical patent/JPWO2024071007A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0344—Electroless sublayer, e.g. Ni, Co, Cd or Ag; Transferred electroless sublayer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09563—Metal filled via

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP2024549351A 2022-09-30 2023-09-25 Withdrawn JPWO2024071007A1 (https=)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2022157395 2022-09-30
JP2023088732 2023-05-30
PCT/JP2023/034644 WO2024071007A1 (ja) 2022-09-30 2023-09-25 配線基板およびそれを用いた実装構造体

Publications (2)

Publication Number Publication Date
JPWO2024071007A1 true JPWO2024071007A1 (https=) 2024-04-04
JPWO2024071007A5 JPWO2024071007A5 (https=) 2025-05-30

Family

ID=90477802

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024549351A Withdrawn JPWO2024071007A1 (https=) 2022-09-30 2023-09-25

Country Status (5)

Country Link
US (1) US20260107383A1 (https=)
JP (1) JPWO2024071007A1 (https=)
CN (1) CN119896046A (https=)
TW (1) TWI881482B (https=)
WO (1) WO2024071007A1 (https=)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05251849A (ja) * 1992-03-09 1993-09-28 Matsushita Electric Works Ltd 銅メタライズドセラミック基板の製造方法
JPH09326547A (ja) * 1996-06-04 1997-12-16 Ibiden Co Ltd プリント配線板の製造方法
JP2004158703A (ja) * 2002-11-07 2004-06-03 Internatl Business Mach Corp <Ibm> プリント配線板とその製造方法
JP2005146328A (ja) * 2003-11-13 2005-06-09 Ebara Udylite Kk 微細配線の製造方法
JP5070767B2 (ja) * 2006-08-28 2012-11-14 トヨタ自動車株式会社 めっき処理方法及びファインピッチ配線基板の製造方法
JP2008192938A (ja) * 2007-02-06 2008-08-21 Kyocera Corp 配線基板、実装構造体および配線基板の製造方法
US9832883B2 (en) * 2013-04-25 2017-11-28 Intel Corporation Integrated circuit package substrate
JP6543921B2 (ja) * 2014-12-01 2019-07-17 大日本印刷株式会社 導電性基板
US12127340B2 (en) * 2019-09-30 2024-10-22 Kyocera Corporation Wiring substrate

Also Published As

Publication number Publication date
TW202423202A (zh) 2024-06-01
TWI881482B (zh) 2025-04-21
WO2024071007A1 (ja) 2024-04-04
US20260107383A1 (en) 2026-04-16
CN119896046A (zh) 2025-04-25

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