CN119896046A - 布线基板以及使用该布线基板的安装构造体 - Google Patents

布线基板以及使用该布线基板的安装构造体 Download PDF

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Publication number
CN119896046A
CN119896046A CN202380068050.0A CN202380068050A CN119896046A CN 119896046 A CN119896046 A CN 119896046A CN 202380068050 A CN202380068050 A CN 202380068050A CN 119896046 A CN119896046 A CN 119896046A
Authority
CN
China
Prior art keywords
layer
conductor
insulating layer
metal layer
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
CN202380068050.0A
Other languages
English (en)
Chinese (zh)
Inventor
汤川英敏
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Publication of CN119896046A publication Critical patent/CN119896046A/zh
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0344—Electroless sublayer, e.g. Ni, Co, Cd or Ag; Transferred electroless sublayer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09563—Metal filled via

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
CN202380068050.0A 2022-09-30 2023-09-25 布线基板以及使用该布线基板的安装构造体 Withdrawn CN119896046A (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
JP2022157395 2022-09-30
JP2022-157395 2022-09-30
JP2023088732 2023-05-30
JP2023-088732 2023-05-30
PCT/JP2023/034644 WO2024071007A1 (ja) 2022-09-30 2023-09-25 配線基板およびそれを用いた実装構造体

Publications (1)

Publication Number Publication Date
CN119896046A true CN119896046A (zh) 2025-04-25

Family

ID=90477802

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202380068050.0A Withdrawn CN119896046A (zh) 2022-09-30 2023-09-25 布线基板以及使用该布线基板的安装构造体

Country Status (5)

Country Link
US (1) US20260107383A1 (https=)
JP (1) JPWO2024071007A1 (https=)
CN (1) CN119896046A (https=)
TW (1) TWI881482B (https=)
WO (1) WO2024071007A1 (https=)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05251849A (ja) * 1992-03-09 1993-09-28 Matsushita Electric Works Ltd 銅メタライズドセラミック基板の製造方法
JPH09326547A (ja) * 1996-06-04 1997-12-16 Ibiden Co Ltd プリント配線板の製造方法
JP2004158703A (ja) * 2002-11-07 2004-06-03 Internatl Business Mach Corp <Ibm> プリント配線板とその製造方法
JP2005146328A (ja) * 2003-11-13 2005-06-09 Ebara Udylite Kk 微細配線の製造方法
JP5070767B2 (ja) * 2006-08-28 2012-11-14 トヨタ自動車株式会社 めっき処理方法及びファインピッチ配線基板の製造方法
JP2008192938A (ja) * 2007-02-06 2008-08-21 Kyocera Corp 配線基板、実装構造体および配線基板の製造方法
US9832883B2 (en) * 2013-04-25 2017-11-28 Intel Corporation Integrated circuit package substrate
JP6543921B2 (ja) * 2014-12-01 2019-07-17 大日本印刷株式会社 導電性基板
US12127340B2 (en) * 2019-09-30 2024-10-22 Kyocera Corporation Wiring substrate

Also Published As

Publication number Publication date
JPWO2024071007A1 (https=) 2024-04-04
TW202423202A (zh) 2024-06-01
TWI881482B (zh) 2025-04-21
WO2024071007A1 (ja) 2024-04-04
US20260107383A1 (en) 2026-04-16

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WW01 Invention patent application withdrawn after publication

Application publication date: 20250425

WW01 Invention patent application withdrawn after publication