JPWO2024070919A5 - - Google Patents

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Publication number
JPWO2024070919A5
JPWO2024070919A5 JP2024549300A JP2024549300A JPWO2024070919A5 JP WO2024070919 A5 JPWO2024070919 A5 JP WO2024070919A5 JP 2024549300 A JP2024549300 A JP 2024549300A JP 2024549300 A JP2024549300 A JP 2024549300A JP WO2024070919 A5 JPWO2024070919 A5 JP WO2024070919A5
Authority
JP
Japan
Prior art keywords
wiring board
organic resin
hole
insulating substrate
board according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2024549300A
Other languages
English (en)
Japanese (ja)
Other versions
JPWO2024070919A1 (https=
Filing date
Publication date
Application filed filed Critical
Priority claimed from PCT/JP2023/034420 external-priority patent/WO2024070919A1/ja
Publication of JPWO2024070919A1 publication Critical patent/JPWO2024070919A1/ja
Publication of JPWO2024070919A5 publication Critical patent/JPWO2024070919A5/ja
Pending legal-status Critical Current

Links

JP2024549300A 2022-09-27 2023-09-22 Pending JPWO2024070919A1 (https=)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2022154175 2022-09-27
PCT/JP2023/034420 WO2024070919A1 (ja) 2022-09-27 2023-09-22 配線基板およびその製造方法

Publications (2)

Publication Number Publication Date
JPWO2024070919A1 JPWO2024070919A1 (https=) 2024-04-04
JPWO2024070919A5 true JPWO2024070919A5 (https=) 2025-05-30

Family

ID=90477731

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2024549300A Pending JPWO2024070919A1 (https=) 2022-09-27 2023-09-22

Country Status (3)

Country Link
US (1) US20260101438A1 (https=)
JP (1) JPWO2024070919A1 (https=)
WO (1) WO2024070919A1 (https=)

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000345119A (ja) * 1999-06-02 2000-12-12 Ajinomoto Co Inc 接着フィルム及びこれを用いた多層プリント配線板の製造法
JP2001257465A (ja) * 2000-03-13 2001-09-21 Ibiden Co Ltd プリント配線板およびその製造方法
JP2010251688A (ja) * 2009-03-25 2010-11-04 Nec Toppan Circuit Solutions Inc 部品内蔵印刷配線板及びその製造方法
JP6878794B2 (ja) * 2016-08-31 2021-06-02 大日本印刷株式会社 有孔基板の製造方法及び有孔基板

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