JP2022054913A5 - - Google Patents

Download PDF

Info

Publication number
JP2022054913A5
JP2022054913A5 JP2020162183A JP2020162183A JP2022054913A5 JP 2022054913 A5 JP2022054913 A5 JP 2022054913A5 JP 2020162183 A JP2020162183 A JP 2020162183A JP 2020162183 A JP2020162183 A JP 2020162183A JP 2022054913 A5 JP2022054913 A5 JP 2022054913A5
Authority
JP
Japan
Prior art keywords
layer
resin
wiring
resin layer
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2020162183A
Other languages
English (en)
Japanese (ja)
Other versions
JP2022054913A (ja
JP7449210B2 (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2020162183A priority Critical patent/JP7449210B2/ja
Priority claimed from JP2020162183A external-priority patent/JP7449210B2/ja
Priority to US17/447,977 priority patent/US11617264B2/en
Publication of JP2022054913A publication Critical patent/JP2022054913A/ja
Publication of JP2022054913A5 publication Critical patent/JP2022054913A5/ja
Application granted granted Critical
Publication of JP7449210B2 publication Critical patent/JP7449210B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2020162183A 2020-09-28 2020-09-28 配線基板及びその製造方法 Active JP7449210B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2020162183A JP7449210B2 (ja) 2020-09-28 2020-09-28 配線基板及びその製造方法
US17/447,977 US11617264B2 (en) 2020-09-28 2021-09-17 Interconnect substrate and method of making the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2020162183A JP7449210B2 (ja) 2020-09-28 2020-09-28 配線基板及びその製造方法

Publications (3)

Publication Number Publication Date
JP2022054913A JP2022054913A (ja) 2022-04-07
JP2022054913A5 true JP2022054913A5 (https=) 2023-03-31
JP7449210B2 JP7449210B2 (ja) 2024-03-13

Family

ID=80822027

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2020162183A Active JP7449210B2 (ja) 2020-09-28 2020-09-28 配線基板及びその製造方法

Country Status (2)

Country Link
US (1) US11617264B2 (https=)
JP (1) JP7449210B2 (https=)

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001203313A (ja) 1999-11-09 2001-07-27 Matsushita Electric Ind Co Ltd 熱伝導基板およびその製造方法
JP4969072B2 (ja) 2005-08-31 2012-07-04 オンセミコンダクター・トレーディング・リミテッド 回路装置およびその製造方法
JP5422427B2 (ja) * 2010-02-08 2014-02-19 太陽ホールディングス株式会社 積層構造体及びそれに用いる感光性ドライフィルム
WO2013094606A1 (ja) * 2011-12-22 2013-06-27 太陽インキ製造株式会社 ドライフィルム及びそれを用いたプリント配線板、プリント配線板の製造方法、及びフリップチップ実装基板
US20140027163A1 (en) * 2012-07-30 2014-01-30 Samsung Electro-Mechanics Co., Ltd. Printed circuit board and method for manufacturing the same
JP5580374B2 (ja) 2012-08-23 2014-08-27 新光電気工業株式会社 配線基板及びその製造方法
JP2016219478A (ja) 2015-05-15 2016-12-22 イビデン株式会社 配線基板及びその製造方法

Similar Documents

Publication Publication Date Title
JP2013062314A5 (https=)
JPH11329715A5 (https=)
TW201044930A (en) Fabricating method of embedded package structure
JP2025159146A5 (ja) 発光装置の製造方法
JPWO2020217404A5 (https=)
JP2024159771A5 (https=)
JP2016149517A5 (https=)
JP2022054913A5 (https=)
JP2011044587A5 (ja) 半導体パッケージの製造方法および半導体パッケージ
JP2005276873A5 (https=)
JP2010073838A5 (https=)
JP2008103548A5 (https=)
JP2008294380A5 (https=)
JP2019046968A5 (https=)
JP5983523B2 (ja) 多層基板およびこれを用いた電子装置、電子装置の製造方法
TWI378752B (en) Method for fibricating a circuit board
JP2008153580A5 (https=)
JP2002151813A5 (https=)
JP2006095996A5 (https=)
CN107801325A (zh) 覆树脂铜箔的制作方法和压合具有大空旷区芯板的方法
JPWO2023032355A5 (https=)
TWI357290B (en) Structure with embedded circuit and process thereo
JPWO2024070919A5 (https=)
TWI674200B (zh) 指紋感測單元壓印系統及其方法
US9668351B2 (en) Package carrier and manufacturing method thereof