JPWO2023063411A5 - - Google Patents

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Publication number
JPWO2023063411A5
JPWO2023063411A5 JP2023554642A JP2023554642A JPWO2023063411A5 JP WO2023063411 A5 JPWO2023063411 A5 JP WO2023063411A5 JP 2023554642 A JP2023554642 A JP 2023554642A JP 2023554642 A JP2023554642 A JP 2023554642A JP WO2023063411 A5 JPWO2023063411 A5 JP WO2023063411A5
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Japan
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region
semiconductor substrate
contact
semiconductor device
trench contact
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JP2023554642A
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English (en)
Japanese (ja)
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JPWO2023063411A1 (https=
JP7658452B2 (ja
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Priority claimed from PCT/JP2022/038340 external-priority patent/WO2023063411A1/ja
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Publication of JPWO2023063411A5 publication Critical patent/JPWO2023063411A5/ja
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JP2023554642A 2021-10-15 2022-10-14 半導体装置 Active JP7658452B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021169659 2021-10-15
JP2021169659 2021-10-15
PCT/JP2022/038340 WO2023063411A1 (ja) 2021-10-15 2022-10-14 半導体装置

Publications (3)

Publication Number Publication Date
JPWO2023063411A1 JPWO2023063411A1 (https=) 2023-04-20
JPWO2023063411A5 true JPWO2023063411A5 (https=) 2024-01-05
JP7658452B2 JP7658452B2 (ja) 2025-04-08

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ID=85988334

Family Applications (1)

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JP2023554642A Active JP7658452B2 (ja) 2021-10-15 2022-10-14 半導体装置

Country Status (4)

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US (1) US20240006520A1 (https=)
JP (1) JP7658452B2 (https=)
CN (1) CN117099215A (https=)
WO (1) WO2023063411A1 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7844088B2 (ja) * 2022-11-01 2026-04-13 三菱電機株式会社 半導体装置およびその製造方法
JP2024098458A (ja) * 2023-01-10 2024-07-23 富士電機株式会社 半導体装置
WO2024236880A1 (ja) * 2023-05-16 2024-11-21 富士電機株式会社 半導体装置
JPWO2025033086A1 (https=) * 2023-08-07 2025-02-13
JP2025138356A (ja) * 2024-03-11 2025-09-25 ミネベアパワーデバイス株式会社 半導体装置

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6204533B1 (en) * 1995-06-02 2001-03-20 Siliconix Incorporated Vertical trench-gated power MOSFET having stripe geometry and high cell density
US6703646B1 (en) * 2002-09-24 2004-03-09 T-Ram, Inc. Thyristor with lightly-doped emitter
JP4760023B2 (ja) * 2005-01-24 2011-08-31 株式会社デンソー 半導体装置
JP5562917B2 (ja) * 2011-09-16 2014-07-30 株式会社東芝 半導体装置及びその製造方法
JP2014056890A (ja) * 2012-09-11 2014-03-27 Toshiba Corp 半導体装置及びその製造方法
JP6319454B2 (ja) * 2014-10-24 2018-05-09 富士電機株式会社 半導体装置および半導体装置の製造方法
WO2018030440A1 (ja) * 2016-08-12 2018-02-15 富士電機株式会社 半導体装置および半導体装置の製造方法
JP6881463B2 (ja) * 2016-09-14 2021-06-02 富士電機株式会社 Ｒｃ−ｉｇｂｔおよびその製造方法
JP2018182254A (ja) * 2017-04-21 2018-11-15 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP6958011B2 (ja) * 2017-06-15 2021-11-02 富士電機株式会社 半導体装置および半導体装置の製造方法
JP2019129300A (ja) * 2018-01-26 2019-08-01 トヨタ自動車株式会社 半導体装置とその製造方法
JP6958575B2 (ja) * 2019-01-16 2021-11-02 株式会社デンソー 半導体装置およびその製造方法
KR102510937B1 (ko) * 2019-04-16 2023-03-15 후지 덴키 가부시키가이샤 반도체 장치 및 제조 방법

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