JPWO2023042638A1 - - Google Patents

Info

Publication number
JPWO2023042638A1
JPWO2023042638A1 JP2023548382A JP2023548382A JPWO2023042638A1 JP WO2023042638 A1 JPWO2023042638 A1 JP WO2023042638A1 JP 2023548382 A JP2023548382 A JP 2023548382A JP 2023548382 A JP2023548382 A JP 2023548382A JP WO2023042638 A1 JPWO2023042638 A1 JP WO2023042638A1
Authority
JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2023548382A
Other languages
Japanese (ja)
Other versions
JP7729391B2 (ja
JPWO2023042638A5 (https=
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of JPWO2023042638A1 publication Critical patent/JPWO2023042638A1/ja
Publication of JPWO2023042638A5 publication Critical patent/JPWO2023042638A5/ja
Application granted granted Critical
Publication of JP7729391B2 publication Critical patent/JP7729391B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/422PN diodes having the PN junctions in mesas
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/109Reduced surface field [RESURF] PN junction structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126Top-view geometrical layouts of the regions or the junctions
    • H10D62/127Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/393Body regions of DMOS transistors or IGBTs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/60Impurity distributions or concentrations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/111Field plates
    • H10D64/117Recessed field plates, e.g. trench field plates or buried field plates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D8/00Diodes
    • H10D8/50PIN diodes 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325Silicon carbide
JP2023548382A 2021-09-16 2022-08-25 絶縁ゲート型バイポーラトランジスタ Active JP7729391B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021151593 2021-09-16
JP2021151593 2021-09-16
PCT/JP2022/032121 WO2023042638A1 (ja) 2021-09-16 2022-08-25 絶縁ゲート型バイポーラトランジスタ

Publications (3)

Publication Number Publication Date
JPWO2023042638A1 true JPWO2023042638A1 (https=) 2023-03-23
JPWO2023042638A5 JPWO2023042638A5 (https=) 2023-11-27
JP7729391B2 JP7729391B2 (ja) 2025-08-26

Family

ID=85602157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2023548382A Active JP7729391B2 (ja) 2021-09-16 2022-08-25 絶縁ゲート型バイポーラトランジスタ

Country Status (5)

Country Link
US (1) US20230395706A1 (https=)
JP (1) JP7729391B2 (https=)
CN (1) CN116888741A (https=)
DE (1) DE112022000506T5 (https=)
WO (1) WO2023042638A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2026053658A1 (ja) * 2024-09-05 2026-03-12 富士電機株式会社 半導体装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08316479A (ja) * 1995-03-14 1996-11-29 Mitsubishi Electric Corp 絶縁ゲート型半導体装置およびその製造方法
JP2008159916A (ja) * 2006-12-25 2008-07-10 Sanyo Electric Co Ltd 半導体装置
JP2016115847A (ja) * 2014-12-16 2016-06-23 富士電機株式会社 半導体装置
JP2017028250A (ja) * 2015-07-16 2017-02-02 富士電機株式会社 半導体装置及びその製造方法
WO2018030440A1 (ja) * 2016-08-12 2018-02-15 富士電機株式会社 半導体装置および半導体装置の製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008288386A (ja) * 2007-05-17 2008-11-27 Hitachi Ltd 半導体装置
CN101694850B (zh) * 2009-10-16 2011-09-14 电子科技大学 一种具有p型浮空层的载流子存储槽栅igbt
US20160211334A1 (en) * 2013-10-04 2016-07-21 Mitsubishi Electric Corporation Silicon carbide semiconductor device and method for manufacturing same
JP2019012762A (ja) * 2017-06-30 2019-01-24 ルネサスエレクトロニクス株式会社 半導体装置及びその製造方法
WO2019142706A1 (ja) 2018-01-17 2019-07-25 富士電機株式会社 半導体装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08316479A (ja) * 1995-03-14 1996-11-29 Mitsubishi Electric Corp 絶縁ゲート型半導体装置およびその製造方法
JP2008159916A (ja) * 2006-12-25 2008-07-10 Sanyo Electric Co Ltd 半導体装置
JP2016115847A (ja) * 2014-12-16 2016-06-23 富士電機株式会社 半導体装置
JP2017028250A (ja) * 2015-07-16 2017-02-02 富士電機株式会社 半導体装置及びその製造方法
WO2018030440A1 (ja) * 2016-08-12 2018-02-15 富士電機株式会社 半導体装置および半導体装置の製造方法

Also Published As

Publication number Publication date
CN116888741A (zh) 2023-10-13
DE112022000506T5 (de) 2024-03-07
JP7729391B2 (ja) 2025-08-26
WO2023042638A1 (ja) 2023-03-23
US20230395706A1 (en) 2023-12-07

Similar Documents

Publication Publication Date Title
BR112023005462A2 (https=)
BR112023012656A2 (https=)
BR112021014123A2 (https=)
BR112023009656A2 (https=)
BR112022009896A2 (https=)
BR112021017747A2 (https=)
JPWO2023063412A1 (https=)
BR112022024743A2 (https=)
BR112022026905A2 (https=)
BR112023011738A2 (https=)
BR112023004146A2 (https=)
BR112023006729A2 (https=)
BR102021018859A2 (https=)
BR102021015500A2 (https=)
BR112023016292A2 (https=)
BR112023011539A2 (https=)
BR112023011610A2 (https=)
BR112023008976A2 (https=)
BR102021020147A2 (https=)
BR102021018926A2 (https=)
BR102021018167A2 (https=)
BR102021017576A2 (https=)
BR102021016837A2 (https=)
BR102021016551A2 (https=)
BR102021016375A2 (https=)

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230829

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20230829

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20241008

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20241205

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20250304

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20250428

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20250715

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20250728

R150 Certificate of patent or registration of utility model

Ref document number: 7729391

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150