JPWO2021241447A1 - - Google Patents
Info
- Publication number
- JPWO2021241447A1 JPWO2021241447A1 JP2022526992A JP2022526992A JPWO2021241447A1 JP WO2021241447 A1 JPWO2021241447 A1 JP WO2021241447A1 JP 2022526992 A JP2022526992 A JP 2022526992A JP 2022526992 A JP2022526992 A JP 2022526992A JP WO2021241447 A1 JPWO2021241447 A1 JP WO2021241447A1
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
- H10W74/47—Encapsulations, e.g. protective coatings characterised by their materials comprising organic materials, e.g. plastics or resins
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
- H10W70/652—Cross-sectional shapes
- H10W70/6525—Cross-sectional shapes for securing the interconnections to the substrate, e.g. to prevent peeling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/59—Bond pads specially adapted therefor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
- H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
- H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2020091169 | 2020-05-26 | ||
| JP2020091169 | 2020-05-26 | ||
| PCT/JP2021/019392 WO2021241447A1 (ja) | 2020-05-26 | 2021-05-21 | 半導体装置、および半導体装置の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPWO2021241447A1 true JPWO2021241447A1 (https=) | 2021-12-02 |
| JP7709435B2 JP7709435B2 (ja) | 2025-07-16 |
Family
ID=78744674
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2022526992A Active JP7709435B2 (ja) | 2020-05-26 | 2021-05-21 | 半導体装置 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US12431399B2 (https=) |
| JP (1) | JP7709435B2 (https=) |
| CN (1) | CN115699295A (https=) |
| DE (1) | DE112021002956T5 (https=) |
| WO (1) | WO2021241447A1 (https=) |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001291721A (ja) * | 2000-04-06 | 2001-10-19 | Nec Corp | 配線構造、導電パターンの形成方法、半導体装置および半導体装置の製造方法 |
| JP2001308478A (ja) * | 2000-04-14 | 2001-11-02 | Three M Innovative Properties Co | 両面配線基板及びその製造方法 |
| JP2008294415A (ja) * | 2007-04-27 | 2008-12-04 | Sanyo Electric Co Ltd | 素子搭載用基板およびその製造方法、半導体モジュールおよびその製造方法、ならびに携帯機器 |
| JP2009177072A (ja) * | 2008-01-28 | 2009-08-06 | Fujikura Ltd | 半導体装置及びその製造方法 |
| JP2013026625A (ja) * | 2011-07-18 | 2013-02-04 | Samsung Electronics Co Ltd | 半導体パッケージ及びその製造方法 |
| JP2017069257A (ja) * | 2015-09-28 | 2017-04-06 | 日立化成株式会社 | 半導体装置の製造方法 |
| JP2018019071A (ja) * | 2016-07-14 | 2018-02-01 | 住友ベークライト株式会社 | 半導体装置の製造方法 |
| WO2018047770A1 (ja) * | 2016-09-08 | 2018-03-15 | 住友ベークライト株式会社 | 半導体装置の製造方法 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100336426C (zh) | 2000-02-25 | 2007-09-05 | 揖斐电株式会社 | 多层印刷电路板以及多层印刷电路板的制造方法 |
| JP4361222B2 (ja) * | 2001-03-19 | 2009-11-11 | 株式会社フジクラ | 半導体パッケージおよび半導体パッケージの製造方法 |
| JP5976073B2 (ja) | 2014-11-07 | 2016-08-23 | 日東電工株式会社 | 半導体装置の製造方法 |
| JP6904055B2 (ja) * | 2017-05-19 | 2021-07-14 | Tdk株式会社 | 半導体ｉｃ内蔵基板及びその製造方法 |
-
2021
- 2021-05-21 DE DE112021002956.8T patent/DE112021002956T5/de not_active Withdrawn
- 2021-05-21 US US17/925,719 patent/US12431399B2/en active Active
- 2021-05-21 JP JP2022526992A patent/JP7709435B2/ja active Active
- 2021-05-21 WO PCT/JP2021/019392 patent/WO2021241447A1/ja not_active Ceased
- 2021-05-21 CN CN202180037156.5A patent/CN115699295A/zh active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001291721A (ja) * | 2000-04-06 | 2001-10-19 | Nec Corp | 配線構造、導電パターンの形成方法、半導体装置および半導体装置の製造方法 |
| JP2001308478A (ja) * | 2000-04-14 | 2001-11-02 | Three M Innovative Properties Co | 両面配線基板及びその製造方法 |
| JP2008294415A (ja) * | 2007-04-27 | 2008-12-04 | Sanyo Electric Co Ltd | 素子搭載用基板およびその製造方法、半導体モジュールおよびその製造方法、ならびに携帯機器 |
| JP2009177072A (ja) * | 2008-01-28 | 2009-08-06 | Fujikura Ltd | 半導体装置及びその製造方法 |
| JP2013026625A (ja) * | 2011-07-18 | 2013-02-04 | Samsung Electronics Co Ltd | 半導体パッケージ及びその製造方法 |
| JP2017069257A (ja) * | 2015-09-28 | 2017-04-06 | 日立化成株式会社 | 半導体装置の製造方法 |
| JP2018019071A (ja) * | 2016-07-14 | 2018-02-01 | 住友ベークライト株式会社 | 半導体装置の製造方法 |
| WO2018047770A1 (ja) * | 2016-09-08 | 2018-03-15 | 住友ベークライト株式会社 | 半導体装置の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP7709435B2 (ja) | 2025-07-16 |
| CN115699295A (zh) | 2023-02-03 |
| WO2021241447A1 (ja) | 2021-12-02 |
| DE112021002956T5 (de) | 2023-03-09 |
| US20230197544A1 (en) | 2023-06-22 |
| US12431399B2 (en) | 2025-09-30 |
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