JPWO2018012300A1 - 積層基板製造方法、積層基板製造装置、積層基板製造システム、および基板処理装置 - Google Patents
積層基板製造方法、積層基板製造装置、積層基板製造システム、および基板処理装置 Download PDFInfo
- Publication number
- JPWO2018012300A1 JPWO2018012300A1 JP2018527512A JP2018527512A JPWO2018012300A1 JP WO2018012300 A1 JPWO2018012300 A1 JP WO2018012300A1 JP 2018527512 A JP2018527512 A JP 2018527512A JP 2018527512 A JP2018527512 A JP 2018527512A JP WO2018012300 A1 JPWO2018012300 A1 JP WO2018012300A1
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- substrates
- bonding
- magnification
- laminated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 863
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 64
- 238000012545 processing Methods 0.000 title claims description 24
- 238000000034 method Methods 0.000 claims abstract description 89
- 238000006073 displacement reaction Methods 0.000 claims abstract description 21
- 238000012937 correction Methods 0.000 claims description 97
- 238000005452 bending Methods 0.000 claims description 10
- 238000009826 distribution Methods 0.000 claims description 4
- 238000003475 lamination Methods 0.000 claims description 2
- 230000008569 process Effects 0.000 description 52
- 238000013461 design Methods 0.000 description 15
- 230000008859 change Effects 0.000 description 13
- 230000004913 activation Effects 0.000 description 11
- 230000000875 corresponding effect Effects 0.000 description 10
- 239000010408 film Substances 0.000 description 10
- 239000012530 fluid Substances 0.000 description 9
- 230000002093 peripheral effect Effects 0.000 description 8
- 238000005259 measurement Methods 0.000 description 6
- 230000007246 mechanism Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 238000001179 sorption measurement Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 238000010030 laminating Methods 0.000 description 4
- 230000008602 contraction Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000005484 gravity Effects 0.000 description 2
- 238000010884 ion-beam technique Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- 230000032258 transport Effects 0.000 description 2
- 239000013598 vector Substances 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical compound [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 238000001069 Raman spectroscopy Methods 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- 230000000274 adsorptive effect Effects 0.000 description 1
- 230000004075 alteration Effects 0.000 description 1
- 238000012993 chemical processing Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000001276 controlling effect Effects 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 230000000994 depressogenic effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/185—Joining of semiconductor bodies for junction formation
- H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67271—Sorting devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67288—Monitoring of warpage, curvature, damage, defects or the like
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Pressure Welding/Diffusion-Bonding (AREA)
Abstract
Description
特許文献1 特開2013−098186号公報
Claims (23)
- 第1の基板と第2の基板とを貼り合わせて積層基板を製造する方法であって、
前記第1の基板および前記第2の基板のそれぞれの湾曲に関する情報に基づいて、前記第1の基板および前記第2の基板が所定の条件を満たすか否かを判断する段階と、
前記所定の条件を満たす場合に、前記第1の基板と前記第2の基板とを貼り合わせる段階と、
を含む積層基板製造方法。 - 前記第1の基板を前記第2の基板に貼り合わせた後の位置ずれ量を、前記情報に基づいて推測する段階を含み、
前記所定の条件は、前記位置ずれ量が閾値以下であることを含む
請求項1に記載の積層基板製造方法。 - 前記情報は、前記第1の基板の歪みの状態および前記第2の基板の歪みの状態を含み、
前記所定の条件は、前記第1の基板の前記歪みの状態と前記第2の基板の前記歪みの状態との組み合わせが、予め定めた組み合わせに該当することを含む
請求項1または2に記載の積層基板製造方法。 - 前記判断する段階において前記所定の条件を満たさない場合に、
前記第1の基板および前記第2の基板を互いに貼り合わせたときの位置ずれ量が閾値以下となるように、前記第1の基板および前記第2の基板の少なくとも一方の形状を変化させる段階をさらに備える請求項1から3のいずれか一項に記載の積層基板製造方法。 - 前記判断する段階において前記所定の条件を満たさない場合に、
前記所定の条件を満たさないと判断された前記第2の基板に代えて、前記第1の基板と貼り合わせたときの位置ずれ量が閾値以下となる第2の基板を、他の複数の第2の基板から選択する段階と
をさらに備える請求項1から4のいずれか一項に記載の積層基板製造方法。 - 前記判断する段階において前記所定の条件を満たさない場合に、
前記第1の基板に貼り合わせた場合に前記第1の基板を前記第2の基板に貼り合わせた後の位置ずれ量が閾値以下になる基板を製造する段階を備える請求項1から5のいずれか一項に記載の積層基板製造方法。 - 前記第1の基板と貼り合わせた状態での倍率が、前記第1の基板の倍率に対して所定の範囲内になるように、前記第2の基板を製造する段階を備える請求項6に記載の積層基板製造方法。
- 前記所定の条件は、前記第1の基板および前記第2の基板を互いに貼り合わせたときの位置ずれ量、または、前記位置ずれ量と閾値との差が、前記第1の基板および前記第2の基板の位置ずれを補正する補正部により補正可能な大きさであることを含む、請求項1から3、および、請求項5から7のいずれか一項に記載の積層基板製造方法。
- 前記情報は、前記第1の基板における反りの大きさ、反りの方向、撓みの大きさ、および、撓みの方向の少なくとも一つを示す情報を含む請求項1から8のいずれか一項に記載の積層基板製造方法。
- 前記情報は、前記第1の基板の中心を基準としたときの複数の位置における変位から求まる全体的な湾曲の情報を含む請求項9に記載の積層基板製造方法。
- 前記情報は、前記第1の基板の製造プロセスを示す情報を含む請求項1から10のいずれか一項に記載の積層基板製造方法。
- 前記情報は、前記第1の基板の製造プロセスから推定した形状を示す情報を含む請求項1から11のいずれか一項に記載の積層基板製造方法。
- 前記情報は、前記第1の基板における応力分布を示す情報を含む請求項1から12のいずれか一項に記載の積層基板製造方法。
- 前記情報は、前記第1の基板に形成された構造物の仕様を示す情報を含む請求項1から13のいずれか一項に記載の積層基板製造方法。
- 互いに貼り合わされる第1の基板および第2の基板のそれぞれの湾曲に関する情報に基づいて、前記第1の基板および前記第2の基板を貼り合わせたときの位置ずれ量を推測する段階を含む積層基板製造方法。
- 複数の基板のそれぞれの湾曲に関する情報に基づいて、複数の基板のうち互いに貼り合わせる二つの基板を選択する段階を含む積層基板製造方法。
- 第1の基板と第2の基板とを貼り合わせて積層基板を製造する装置であって、
前記第1の基板および前記第2の基板の湾曲に関する情報に基づいて所定の条件を満たすと判断された前記第1の基板と前記第2の基板とを貼り合わせる貼り合わせ部を備える積層基板製造装置。 - 前記情報に基づいて、前記第1の基板および前記第2の基板が前記所定の条件を満たすか否かを判断する判断部を備え、
前記判断部は、前記所定の条件を満たさない場合に、前記所定の条件を満たさないと判断された前記第2の基板に代えて、前記第1の基板と貼り合わせたときの位置ずれ量が予め定めた値以下となる第2の基板を、他の複数の第2の基板から選択する請求項17に記載の積層基板製造装置。 - 前記所定の条件を満たさない場合に、前記第1の基板および前記第2の基板を互いに貼り合わせたときの位置ずれ量が予め定めた値以下となるように、前記第1の基板および前記第2の基板の少なくとも一方の形状を変化させて補正する補正部をさらに備える請求項17または18に記載の積層基板製造装置。
- 第1の基板および第2の基板を処理する基板処理装置と、
前記基板処理装置で処理された前記第1の基板と前記第2の基板とを貼り合せる貼り合せ装置と
を備えるシステムであって、
前記基板処理装置は、
前記第1の基板および前記第2の基板のそれぞれの湾曲に関する情報に基づいて、前記第1の基板および前記第2の基板が所定の条件を満たすか否かを判断する判断部と、
前記所定の条件を満たす前記第1の基板および前記第2の基板を貼り合わせる指示信号を前記貼り合せ装置に出力する制御部と、
を含む積層基板製造システム。 - 前記判断部は、前記所定の条件を満たさないと判断した場合に、前記第1の基板と貼り合わせたときの位置ずれ量が閾値以下となる第2の基板を複数の第2の基板から選択し、
前記制御部は、前記判断部により選択された前記第2の基板と前記第1の基板とを貼り合わせる指示信号を前記貼り合せ装置に出力する請求項20に記載の積層基板製造システム。 - 互いに貼り合わされる第1の基板および第2の基板のそれぞれの湾曲に関する情報に基づいて、前記第1の基板および前記第2の基板を貼り合わせたときの位置ずれ量を推測する推測部を備える基板処理装置。
- 複数の基板のそれぞれの湾曲に関する情報に基づいて、複数の基板のうち互いに貼り合わせる二つの基板を選択する選択部を備える基板処理装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2022070731A JP7416119B2 (ja) | 2016-07-12 | 2022-04-22 | 積層基板製造方法、積層基板製造装置、積層基板製造システム、および基板処理装置 |
JP2023221620A JP2024038179A (ja) | 2016-07-12 | 2023-12-27 | 基板選択方法、積層基板製造方法、基板選択装置、および積層基板製造システム |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016138029 | 2016-07-12 | ||
JP2016138029 | 2016-07-12 | ||
PCT/JP2017/023942 WO2018012300A1 (ja) | 2016-07-12 | 2017-06-29 | 積層基板製造方法、積層基板製造装置、積層基板製造システム、および基板処理装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2022070731A Division JP7416119B2 (ja) | 2016-07-12 | 2022-04-22 | 積層基板製造方法、積層基板製造装置、積層基板製造システム、および基板処理装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2018012300A1 true JPWO2018012300A1 (ja) | 2019-05-09 |
JP7067474B2 JP7067474B2 (ja) | 2022-05-16 |
Family
ID=60952014
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2018527512A Active JP7067474B2 (ja) | 2016-07-12 | 2017-06-29 | 積層基板製造方法、積層基板製造装置、積層基板製造システム、および基板処理装置 |
JP2022070731A Active JP7416119B2 (ja) | 2016-07-12 | 2022-04-22 | 積層基板製造方法、積層基板製造装置、積層基板製造システム、および基板処理装置 |
JP2023221620A Pending JP2024038179A (ja) | 2016-07-12 | 2023-12-27 | 基板選択方法、積層基板製造方法、基板選択装置、および積層基板製造システム |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2022070731A Active JP7416119B2 (ja) | 2016-07-12 | 2022-04-22 | 積層基板製造方法、積層基板製造装置、積層基板製造システム、および基板処理装置 |
JP2023221620A Pending JP2024038179A (ja) | 2016-07-12 | 2023-12-27 | 基板選択方法、積層基板製造方法、基板選択装置、および積層基板製造システム |
Country Status (5)
Country | Link |
---|---|
US (2) | US11842905B2 (ja) |
JP (3) | JP7067474B2 (ja) |
KR (3) | KR102651753B1 (ja) |
TW (2) | TW202147391A (ja) |
WO (1) | WO2018012300A1 (ja) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP7234494B2 (ja) * | 2018-01-19 | 2023-03-08 | 株式会社ニコン | 接合装置および接合方法 |
JP7127286B2 (ja) * | 2018-01-26 | 2022-08-30 | 株式会社ニコン | 積層装置、活性化装置、制御装置、積層体の製造装置、および積層体の製造方法 |
TW201944458A (zh) * | 2018-04-12 | 2019-11-16 | 日商尼康股份有限公司 | 位置對準方法及位置對準裝置 |
TWI828760B (zh) * | 2018-10-25 | 2024-01-11 | 日商尼康股份有限公司 | 基板貼合裝置、參數計算裝置、基板貼合方法及參數計算方法 |
JP7204537B2 (ja) * | 2019-03-05 | 2023-01-16 | キオクシア株式会社 | 基板貼合装置および半導体装置の製造方法 |
JP7250641B2 (ja) | 2019-08-06 | 2023-04-03 | キオクシア株式会社 | アライメント装置及び半導体装置の製造方法 |
JP7355687B2 (ja) | 2020-03-19 | 2023-10-03 | キオクシア株式会社 | 貼合装置および貼合方法 |
US11829077B2 (en) * | 2020-12-11 | 2023-11-28 | Kla Corporation | System and method for determining post bonding overlay |
US11782411B2 (en) | 2021-07-28 | 2023-10-10 | Kla Corporation | System and method for mitigating overlay distortion patterns caused by a wafer bonding tool |
WO2023153317A1 (ja) * | 2022-02-10 | 2023-08-17 | 株式会社ニコン | 基板補正装置、基板積層装置、基板処理システム、基板補正方法、基板処理方法、および半導体装置の製造方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015066232A1 (en) * | 2013-10-29 | 2015-05-07 | Kla-Tencor Corporation | Process-induced distortion prediction and feedforward and feedback correction of overlay errors |
WO2016093284A1 (ja) * | 2014-12-10 | 2016-06-16 | 株式会社ニコン | 基板重ね合わせ装置および基板重ね合わせ方法 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1174164A (ja) * | 1997-08-27 | 1999-03-16 | Canon Inc | 基板処理装置、基板支持装置及び基板処理方法並びに基板の製造方法 |
JP3501276B2 (ja) * | 1998-12-17 | 2004-03-02 | シャープ株式会社 | 半導体ウエハの位置合わせ方法 |
JP4938231B2 (ja) * | 2004-10-25 | 2012-05-23 | ルネサスエレクトロニクス株式会社 | 平坦度測定器 |
JP4899879B2 (ja) * | 2007-01-17 | 2012-03-21 | 東京エレクトロン株式会社 | 基板処理装置、基板処理方法及び記憶媒体 |
FR2962594B1 (fr) | 2010-07-07 | 2012-08-31 | Soitec Silicon On Insulator | Procede de collage par adhesion moleculaire avec compensation de desalignement radial |
JP5617418B2 (ja) | 2010-08-05 | 2014-11-05 | 株式会社ニコン | 半導体基板の積層方法、半導体基板の積層装置およびデバイスの製造方法 |
WO2012147343A1 (ja) * | 2011-04-26 | 2012-11-01 | 株式会社ニコン | 基板貼り合わせ装置、基板保持装置、基板貼り合わせ方法、基盤保持方法、積層半導体装置および重ね合わせ基板 |
JP2013098186A (ja) | 2011-10-27 | 2013-05-20 | Mitsubishi Heavy Ind Ltd | 常温接合装置 |
WO2013088733A1 (ja) * | 2011-12-14 | 2013-06-20 | 株式会社ニコン | 基板ホルダ及び一対の基板ホルダ |
WO2013145622A1 (ja) * | 2012-03-28 | 2013-10-03 | 株式会社ニコン | 基板貼り合わせ装置および基板貼り合わせ方法 |
WO2014064944A1 (ja) * | 2012-10-26 | 2014-05-01 | 株式会社ニコン | 基板貼り合わせ装置、位置合わせ装置、基板貼り合わせ方法、位置合わせ方法、及び、積層半導体装置の製造方法 |
US10279575B2 (en) * | 2013-05-29 | 2019-05-07 | Ev Group E. Thallner Gmbh | Device and method for bonding substrates |
-
2017
- 2017-06-29 WO PCT/JP2017/023942 patent/WO2018012300A1/ja active Application Filing
- 2017-06-29 KR KR1020237017417A patent/KR102651753B1/ko active IP Right Grant
- 2017-06-29 KR KR1020187036761A patent/KR102429940B1/ko active IP Right Grant
- 2017-06-29 JP JP2018527512A patent/JP7067474B2/ja active Active
- 2017-06-29 KR KR1020227012597A patent/KR102537289B1/ko active IP Right Grant
- 2017-07-07 TW TW110132954A patent/TW202147391A/zh unknown
- 2017-07-07 TW TW106122843A patent/TWI742109B/zh active
-
2019
- 2019-01-10 US US16/244,729 patent/US11842905B2/en active Active
-
2022
- 2022-04-22 JP JP2022070731A patent/JP7416119B2/ja active Active
-
2023
- 2023-09-27 US US18/475,895 patent/US20240021447A1/en active Pending
- 2023-12-27 JP JP2023221620A patent/JP2024038179A/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2015066232A1 (en) * | 2013-10-29 | 2015-05-07 | Kla-Tencor Corporation | Process-induced distortion prediction and feedforward and feedback correction of overlay errors |
WO2016093284A1 (ja) * | 2014-12-10 | 2016-06-16 | 株式会社ニコン | 基板重ね合わせ装置および基板重ね合わせ方法 |
Also Published As
Publication number | Publication date |
---|---|
JP7067474B2 (ja) | 2022-05-16 |
JP2024038179A (ja) | 2024-03-19 |
US20190148184A1 (en) | 2019-05-16 |
WO2018012300A1 (ja) | 2018-01-18 |
KR20190027787A (ko) | 2019-03-15 |
KR102537289B1 (ko) | 2023-05-30 |
TWI742109B (zh) | 2021-10-11 |
JP7416119B2 (ja) | 2024-01-17 |
US20240021447A1 (en) | 2024-01-18 |
KR20230078828A (ko) | 2023-06-02 |
US11842905B2 (en) | 2023-12-12 |
KR20220051033A (ko) | 2022-04-25 |
TW201812839A (zh) | 2018-04-01 |
KR102651753B1 (ko) | 2024-03-28 |
KR102429940B1 (ko) | 2022-08-08 |
JP2022106830A (ja) | 2022-07-20 |
TW202147391A (zh) | 2021-12-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP7416119B2 (ja) | 積層基板製造方法、積層基板製造装置、積層基板製造システム、および基板処理装置 | |
JP6617718B2 (ja) | 基板重ね合わせ装置および基板処理方法 | |
JP6988801B2 (ja) | 積層装置および積層方法 | |
WO2018221391A1 (ja) | 基板貼り合わせ方法、積層基板製造装置及び積層基板製造システム | |
KR102523425B1 (ko) | 적층 기판의 제조 방법, 제조 장치, 및 적층 반도체 장치 | |
JP2024045175A (ja) | 積層基板の製造方法および製造装置 | |
KR102511929B1 (ko) | 위치 맞춤 방법 및 위치 맞춤 장치 | |
JP2019129165A (ja) | 接合装置および接合方法 | |
JP2019071329A (ja) | 基板接合方法および基板接合装置 | |
WO2023153317A1 (ja) | 基板補正装置、基板積層装置、基板処理システム、基板補正方法、基板処理方法、および半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180919 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20200116 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20210323 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20210517 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20210714 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20211214 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20220208 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20220329 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20220411 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 7067474 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |