JPWO2015004883A1 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 95
- 210000000746 body region Anatomy 0.000 claims abstract description 56
- 239000000758 substrate Substances 0.000 claims description 32
- 230000015556 catabolic process Effects 0.000 claims description 20
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 20
- 229920005591 polysilicon Polymers 0.000 claims description 20
- 238000009792 diffusion process Methods 0.000 claims description 4
- 230000002457 bidirectional effect Effects 0.000 abstract description 13
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 18
- 229910052814 silicon oxide Inorganic materials 0.000 description 18
- 238000000034 method Methods 0.000 description 17
- 239000012535 impurity Substances 0.000 description 10
- 230000004048 modification Effects 0.000 description 9
- 238000012986 modification Methods 0.000 description 9
- 238000005530 etching Methods 0.000 description 7
- 239000011229 interlayer Substances 0.000 description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 5
- 229910052796 boron Inorganic materials 0.000 description 5
- 239000010410 layer Substances 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000007792 addition Methods 0.000 description 2
- 238000001459 lithography Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000000149 penetrating effect Effects 0.000 description 2
- HBBGRARXTFLTSG-UHFFFAOYSA-N Lithium ion Chemical compound [Li+] HBBGRARXTFLTSG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910001416 lithium ion Inorganic materials 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7831—Field effect transistors with field effect produced by an insulated gate with multiple gate structure
- H01L29/7832—Field effect transistors with field effect produced by an insulated gate with multiple gate structure the structure comprising a MOS gate and at least one non-MOS gate, e.g. JFET or MESFET gate
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Abstract
Description
以下、実施例1に係る半導体装置について、図1〜7を参照しながら説明する。
図8は、本開示の縦型ゲート半導体装置の第1の変形例を示す断面図である。
図9は、本開示の縦型ゲート半導体装置の第2の変形例を示す平面図である。
図10は、本開示の縦型ゲート半導体装置の第3の変形例を示す平面図である。図11は、本発明の一実施形態における縦型ゲート半導体装置の第3の変形例を示す図10のXI−XI’線における断面図である。図12は、本開示の一実施形態における縦型ゲート半導体装置の第3の変形例を示す図11のXII−XII’線における平面図である。
図13は、本開示の縦型ゲート半導体装置の第4の変形例を示す平面図である。図14は、本開示の一実施形態における縦型ゲート半導体装置の第4の変形例を示す図13のXIV−XIV’線における断面図である。図15は、本開示の一実施形態における縦型ゲート半導体装置の第4の変形例を示す図13のXV−XV’線における断面図である。
4 半導体基板
6 ドリフト領域
8 シリコン酸化膜
10 第1のトレンチ
12 バックゲート電極
14 バックゲートキャップ酸化膜
16 シリコン酸化膜
18 第2のトレンチ
20 ゲート絶縁膜
22 ゲート電極
24 ゲートキャップ酸化膜
26 ボディ領域
28 ソース領域
30 シリコン酸化膜
32 層間絶縁膜
34 ソース端子
36 ゲート端子
38 ドレイン端子
40 バックゲート端子
42 P+バックゲート電極
44 バックゲートコンタクト電極
図8は、本開示の縦型ゲート半導体装置の実施例2を示す断面図である。
図9は、本開示の縦型ゲート半導体装置の実施例3を示す平面図である。
Claims (7)
- ドレイン領域となる第一導電型の半導体基板と、
ドレイン領域上に形成されたドリフト領域と、
前記ドリフト領域上部に形成された第二導電型のボディ領域と、
前記ボディ領域上部に形成された第一導電型のソース領域と、
前記ソース領域および前記ボディ領域を貫通し、前記ドリフト領域に達するトレンチと、
前記トレンチ内壁に形成された絶縁膜と、
前記絶縁膜の内側に形成されたゲート電極と、
前記ボディ領域内部に形成され、かつ前記ボディ領域と電気的に接続された第二導電型のバックゲート電極とを有し、
前記ドレイン領域に高電圧が印加され、前記ソース領域と前記ボディ領域に前記高電圧より低い電圧である低電圧が印加され、かつ前記ゲート電極と前記ソース領域の間に第1の閾値以上の電圧が印加されると、前記ドレイン領域から前記ソース領域に電流が流れ、
前記ソース領域に前記高電圧、前記ドレイン領域と前記ボディ領域に前記低電圧が印加され、かつ前記ゲート電極と前記ドレイン領域の間に第2の閾値以上の電圧が印加されると、前記ソース領域から前記ドレイン領域に電流が流れ、
前記バックゲート電極のシート抵抗値は前記ボディ領域のシート抵抗値より小さく、
前記ソース領域と前記バックゲート電極とは、前記ソース領域と前記ドレイン領域の間に最大動作電圧を印加されても、前記ソース領域と前記バックゲート電極の間で降伏現象が発生しない間隔で配置された
ことを特徴とする半導体装置。 - 前記バックゲート電極と前記ソース領域の間に絶縁膜が形成された請求項1記載の半導体装置。
- 前記バックゲート電極がポリシリコンからなる請求項1または2記載の半導体装置。
- 前記バックゲート電極が拡散層からなる請求項1または2記載の半導体装置。
- 前記バックゲート電極はバックゲート端子と第1のコンタクトで接続され、
前記ゲート電極はゲート端子と第2のコンタクトで接続され、
前記バックゲート端子に電圧が印加されると前記第1のコンタクトから電圧駆動される前記バックゲート電極の電圧駆動距離が、前記ゲート端子に電圧が印加されると前記第2のコンタクトから電圧駆動される前記ゲート電極の電圧駆動距離よりも短い
ことを特徴とする請求項1または2記載の半導体装置。 - 平面視において、前記ゲート電極が前記バックゲート電極に囲まれた請求項1または2記載の半導体装置。
- 前記バックゲート電極が前記ボディ領域と前記ドリフト領域にまたがって設けられた請求項1または2記載の半導体装置。
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JP2013145211 | 2013-07-11 | ||
JP2013145211 | 2013-07-11 | ||
PCT/JP2014/003527 WO2015004883A1 (ja) | 2013-07-11 | 2014-07-02 | 半導体装置 |
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JPWO2015004883A1 true JPWO2015004883A1 (ja) | 2017-03-02 |
JP6421337B2 JP6421337B2 (ja) | 2018-11-14 |
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US (1) | US9406796B2 (ja) |
JP (1) | JP6421337B2 (ja) |
CN (1) | CN105378933B (ja) |
WO (1) | WO2015004883A1 (ja) |
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JP2020057639A (ja) * | 2018-09-28 | 2020-04-09 | ソニーセミコンダクタソリューションズ株式会社 | 半導体装置及び半導体装置の製造方法 |
CN110310982A (zh) * | 2019-04-03 | 2019-10-08 | 杭州士兰微电子股份有限公司 | 双向功率器件及其制造方法 |
Citations (2)
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JP2002270841A (ja) * | 2001-03-13 | 2002-09-20 | Denso Corp | 半導体装置及びその製造方法 |
JP2009170532A (ja) * | 2008-01-11 | 2009-07-30 | Sanyo Electric Co Ltd | 絶縁ゲート型半導体装置およびその製造方法 |
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JPS55146976A (en) * | 1979-05-02 | 1980-11-15 | Nec Corp | Insulating gate field effect transistor |
JPH01238067A (ja) * | 1988-03-18 | 1989-09-22 | Fujitsu Ltd | 絶縁ゲート型バイポーラトランジスタ |
JPH09129868A (ja) * | 1995-10-30 | 1997-05-16 | Nec Corp | 半導体装置及びその製造方法 |
US7345342B2 (en) * | 2001-01-30 | 2008-03-18 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
TWI248136B (en) * | 2002-03-19 | 2006-01-21 | Infineon Technologies Ag | Method for fabricating a transistor arrangement having trench transistor cells having a field electrode |
JP3652322B2 (ja) * | 2002-04-30 | 2005-05-25 | Necエレクトロニクス株式会社 | 縦型mosfetとその製造方法 |
JP5073991B2 (ja) * | 2006-08-23 | 2012-11-14 | オンセミコンダクター・トレーディング・リミテッド | 絶縁ゲート型半導体装置 |
US7910439B2 (en) * | 2008-06-11 | 2011-03-22 | Maxpower Semiconductor Inc. | Super self-aligned trench MOSFET devices, methods, and systems |
JP4645705B2 (ja) * | 2008-08-29 | 2011-03-09 | ソニー株式会社 | 半導体装置及び半導体装置の製造方法 |
JP5825744B2 (ja) * | 2011-09-15 | 2015-12-02 | 株式会社半導体エネルギー研究所 | パワー絶縁ゲート型電界効果トランジスタ |
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- 2014-07-02 WO PCT/JP2014/003527 patent/WO2015004883A1/ja active Application Filing
- 2014-07-02 JP JP2015526156A patent/JP6421337B2/ja active Active
- 2014-07-02 CN CN201480038882.9A patent/CN105378933B/zh active Active
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JP2002270841A (ja) * | 2001-03-13 | 2002-09-20 | Denso Corp | 半導体装置及びその製造方法 |
JP2009170532A (ja) * | 2008-01-11 | 2009-07-30 | Sanyo Electric Co Ltd | 絶縁ゲート型半導体装置およびその製造方法 |
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US20160104795A1 (en) | 2016-04-14 |
CN105378933A (zh) | 2016-03-02 |
JP6421337B2 (ja) | 2018-11-14 |
WO2015004883A1 (ja) | 2015-01-15 |
CN105378933B (zh) | 2018-11-16 |
US9406796B2 (en) | 2016-08-02 |
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