JPWO2009081648A1 - 素子搭載基板の製造方法 - Google Patents
素子搭載基板の製造方法 Download PDFInfo
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Abstract
Description
14 パッド
16 仮止め材
17,17x 仮止め材
20,20x 素子
23x 外部電極
24 接着層
Claims (6)
- 加熱されると粘着力を生じる接着層が形成された素子と、基板とを用意する第1の工程と、
前記基板に前記素子を配置する第2の工程と、
前記基板に前記素子が配置された状態で加熱した後に冷却して、前記素子の前記接着層が前記基板に接着される第3の工程と、
を備え、
前記第2の工程において、
前記素子が配置されるべき前記基板の所定領域の一部分に流動性を有する仮止め材を配置した後、前記素子の前記接着層が空間を設けて前記基板に対向し、かつ前記素子が前記仮止め材に接するように、前記基板に前記素子を配置し、
前記第3の工程において、前記仮止め材が加熱されて消失又は変形して、前記素子の前記接着層と前記基板との間の前記空間がなくなって前記素子の前記接着層が前記基板に接し、前記素子の前記接着層が前記基板に接着されることを特徴とする、素子搭載基板の製造方法。 - 前記第2の工程において、前記仮止め材は液状であり、
前記第3の工程において、前記仮止め材は加熱されて消失することを特徴とする、請求項1に記載の素子搭載基板の製造方法。 - 前記第2の工程において、前記仮止め材はペースト状であり、
前記第3の工程において、前記仮止め材は加熱されて変形することを特徴とする、請求項1に記載の素子搭載基板の製造方法。 - 前記素子は外部電極を有し、
前記基板はパッドを有し、
前記第2の工程において、前記仮止め材は、半田ペーストであり、前記基板の前記パッドに配置され、かつ前記素子の前記外部電極に接することを特徴とする、請求項3に記載の素子搭載基板の製造方法。 - 前記仮止め材が変形又は消失を開始する温度が、前記接着層に粘着力が生じる温度よりも低いことを特徴とする、請求項1乃至4のいずれか一つに記載の素子搭載基板の製造方法。
- 前記接着層は、熱硬化性樹脂又は熱可塑性樹脂を主成分とすることを特徴とする請求項1乃至5のいずれか一つに記載の素子搭載基板の製造方法。
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