JP2009259998A - 電子部品モジュールの製造方法 - Google Patents
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01—ELECTRIC ELEMENTS
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
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- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H—ELECTRICITY
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
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- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10954—Other details of electrical connections
- H05K2201/10977—Encapsulated connections
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/068—Features of the lamination press or of the lamination process, e.g. using special separator sheets
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
- H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10T29/49169—Assembling electrical component directly to terminal or elongated conductor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y10T29/49171—Assembling electrical component directly to terminal or elongated conductor with encapsulating
- Y10T29/49172—Assembling electrical component directly to terminal or elongated conductor with encapsulating by molding of insulating material
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- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
【解決手段】受動素子としてのCR部品9と能動素子としてのICチップ8とを同一のベース配線層1に装着した構成の電子部品モジュール15の製造に際し、ベース配線層1の回路形成面2aに半田粒子7を含んだ接着剤層5Aを形成し、ICチップ8を先にベース配線層1に搭載して熱圧着した後にCR部品9を接着剤層5Aによってベース配線層1に接着し、その後に封止樹脂層を形成するための熱硬化シート12をCR部品9とICチップ8が接着されたベース配線層1の回路形成面2aに貼り合わせて熱圧着を行って、接着剤層5Aの硬化およびこの接着剤層5Aに含まれた半田粒子7の溶融を同時に行う。
【選択図】図2
Description
を形成するための熱硬化シートを、前記受動素子と前記能動素子が接着された前記回路形成面に貼り合わせて熱圧着を行うことにより、前記接着剤層の硬化およびこの接着剤層に含まれた前記半田粒子の溶融を同時に行うプレス工程とを含む。
なおここでは回路形成面2aにおいて第1のランド部3、第2のランド部4を覆う範囲のみに接着剤層を形成するようにしている。もちろん、回路形成面2aの全範囲に接着剤層5Aを形成しても差し支えないが、省資源・コスト低減の観点からは、少なくとも第1のランド部3、第2のランド部4を覆う範囲に限定することが望ましい。
、半田粒子7を溶融させることなく熱硬化性樹脂6Aの熱硬化反応の促進のための加熱のみを併せて行うようにしてもよい。すなわち、熱圧着ツール11による加熱条件を半田粒子7が溶融しない温度までの加熱に設定し、熱硬化性樹脂6Aの熱硬化反応のみを進行させる。この場合においても前述と同様に、熱硬化性樹脂6Aが未だ半硬化の状態であるうちに、熱圧着ツール11による加圧と加熱を解除するように、工程条件を設定する。さらに能動素子熱圧着工程に替えて、金属バンプ8aを第2のランド部4に位置あわせして押圧するのみで、ICチップ8の加熱は行わないようにしてもよい。この場合には、後工程のプレス工程における加熱によって、半硬化状態の熱硬化性樹脂6Aの熱硬化反応を完了させるとともに半田粒子7を溶融させて半田接合を行う。
2 樹脂基板
2a 回路形成面
3 第1のランド部
4 第2のランド部
5 樹脂接着剤
5A 接着剤層
5B 樹脂補強部
6,6A 熱硬化性樹脂
7 半田粒子
7A 半田接合部
8 ICチップ
8a 金属バンプ
9 CR部品
9a 端子電極
11 熱圧着ツール
12 熱硬化シート
13A 封止樹脂層
15 電子部品モジュール
Claims (3)
- 回路形成面に受動素子を接続するための第1のランド部および能動素子を接続するための第2のランド部を有する配線パターンが形成されたベース配線層に、前記受動素子の端子を前記第1のランド部に前記能動素子の端子を前記第2のランド部にそれぞれ電気的に接続した状態で装着し、前記回路形成面に密着して形成された封止樹脂層によって前記受動素子と能動素子とを封止して成る電子部品モジュールを製造する電子部品モジュールの製造方法であって、
前記回路形成面であって少なくとも前記第1のランド部と第2のランド部を覆う範囲に半田粒子を含んだ接着剤層を形成する接着剤層形成工程と、
前記能動素子の端子を前記第2のランド部に位置合わせし、熱圧着ツールによって前記能動素子を前記ベース配線層へ加圧するとともに加熱によりこの能動素子の端子に接する半田粒子を溶融させて前記ベース配線層に接着し、前記接着剤層が半硬化であるうちに前記熱圧着ツールによる加圧と加熱を解除する能動素子熱圧着工程と、
前記能動素子熱圧着工程の後、前記受動素子の端子を前記第1のランド部に位置合わせして前記ベース配線層に搭載して接着する受動素子搭載工程と、
前記封止樹脂層を形成するための熱硬化シートを、前記受動素子と前記能動素子が接着された前記回路形成面に貼り合わせて熱圧着を行うことにより、前記接着剤層の硬化およびこの接着剤層に含まれた前記半田粒子の溶融を同時に行うプレス工程とを含むことを特徴とする電子部品モジュールの製造方法。 - 前記接着剤層形成工程は、半田粒子を含んだ液状の接着剤を少なくとも前記第1のランド部と第2のランド部上に配置する接着剤配置工程と、配置された前記接着剤を半硬化させる半硬化工程とを含むことを特徴とする請求項1記載の電子部品モジュールの製造方法。
- 前記接着剤層形成工程において、半田粒子を含んだシート状の接着剤を少なくとも前記第1のランド部と第2のランド部上に配置することを特徴とする請求項1記載の電子部品モジュールの製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008106496A JP4998360B2 (ja) | 2008-04-16 | 2008-04-16 | 電子部品モジュールの製造方法 |
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JP2012023066A (ja) * | 2010-07-12 | 2012-02-02 | Panasonic Corp | 電子部品接合方法 |
JP2012023263A (ja) * | 2010-07-16 | 2012-02-02 | Panasonic Corp | 電子部品接合方法 |
JP2012023067A (ja) * | 2010-07-12 | 2012-02-02 | Panasonic Corp | 電子部品実装方法 |
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JP2020061406A (ja) * | 2018-10-05 | 2020-04-16 | 株式会社村田製作所 | 半導体装置 |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP2003197849A (ja) * | 2001-10-18 | 2003-07-11 | Matsushita Electric Ind Co Ltd | 部品内蔵モジュールとその製造方法 |
JP2004047772A (ja) * | 2002-07-12 | 2004-02-12 | Matsushita Electric Ind Co Ltd | 電子部品の接合材料および電子部品実装方法 |
JP2007027173A (ja) * | 2005-07-12 | 2007-02-01 | Matsushita Electric Ind Co Ltd | 電子部品実装構造体 |
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JPH08104762A (ja) * | 1994-10-04 | 1996-04-23 | Sekisui Chem Co Ltd | 模様付け成形用シート及びそれを利用した模様付け成形法 |
JP3928753B2 (ja) * | 1996-08-06 | 2007-06-13 | 日立化成工業株式会社 | マルチチップ実装法、および接着剤付チップの製造方法 |
JP2007047240A (ja) * | 2005-08-08 | 2007-02-22 | Sanyo Epson Imaging Devices Corp | 仮止め材及びそれを用いた液晶表示装置の製造方法 |
JP2007088009A (ja) | 2005-09-20 | 2007-04-05 | Cmk Corp | 電子部品の埋め込み方法及び電子部品内蔵プリント配線板 |
KR101143837B1 (ko) * | 2007-10-15 | 2012-07-12 | 삼성테크윈 주식회사 | 전자 소자를 내장하는 회로기판 및 회로기판의 제조 방법 |
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JP2003197849A (ja) * | 2001-10-18 | 2003-07-11 | Matsushita Electric Ind Co Ltd | 部品内蔵モジュールとその製造方法 |
JP2004047772A (ja) * | 2002-07-12 | 2004-02-12 | Matsushita Electric Ind Co Ltd | 電子部品の接合材料および電子部品実装方法 |
JP2007027173A (ja) * | 2005-07-12 | 2007-02-01 | Matsushita Electric Ind Co Ltd | 電子部品実装構造体 |
Cited By (3)
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JP2012023066A (ja) * | 2010-07-12 | 2012-02-02 | Panasonic Corp | 電子部品接合方法 |
JP2012023067A (ja) * | 2010-07-12 | 2012-02-02 | Panasonic Corp | 電子部品実装方法 |
JP2012023263A (ja) * | 2010-07-16 | 2012-02-02 | Panasonic Corp | 電子部品接合方法 |
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US7841081B2 (en) | 2010-11-30 |
JP4998360B2 (ja) | 2012-08-15 |
US20090260230A1 (en) | 2009-10-22 |
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