JPWO2008029800A1 - 基板処理方法および記憶媒体 - Google Patents
基板処理方法および記憶媒体 Download PDFInfo
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Abstract
Description
また他の目的は、そのような製造方法を実行するプログラムが記憶された記憶媒体を提供することにある。
なお、メイン制御部110による全体的な制御は行なわず、あるいは、メイン制御部110による全体的な制御と重畳して、処理部100の各装置毎にプロセスコントローラ、ユーザーインターフェースおよび記憶部を含む制御部を個別に配備して制御を行なう構成を採用することもできる。
図10はデュアルダマシン法による半導体装置の製造プロセスを示すフローチャート、図11は図10のフローチャートに示す各工程の状態を説明するための説明図である。
変性処理(VOS):105℃、1分
溶解除去処理(Wet):有機アルカリ系薬液 1分
シリル化処理(LKR):150℃、150秒
ベーク処理(Bake):大気圧下、30分
Claims (28)
- 基板上に形成された低誘電率膜をエッチング処理して所定パターンを形成することと、
前記エッチング処理を終了した後に残存する物質を所定の液に対して可溶化するように変性させることと、
前記所定の液を供給して前記変性された物質を溶解除去することと、
次いで、前記変性された物質の溶解除去後の低誘電率膜の表面にシリル化剤を供給してシリル化処理することと、
前記シリル化処理の後、基板をベークすることと
を有する基板処理方法。 - 前記残存する物質を変性させた後、前記変性された物質を溶解除去する前に、前記パターンが形成された低誘電率膜の表面にシリル化剤を供給してシリル化処理することをさらに有する、請求項1に記載の基板処理方法。
- 前記低誘電率膜は、ポーラス低誘電率材料からなる、請求項1に記載の基板処理方法。
- 前記低誘電率膜は、アルキル基を末端基として有する、請求項1に記載の基板処理方法。
- 前記残存する物質の変性は、水蒸気とオゾンを含む処理ガスを供給して行う、請求項1に記載の基板処理方法。
- 前記残存する物質の変性は、オゾンを含む処理ガスを供給して行う、請求項1に記載の基板処理方法。
- 前記所定の液は、酸性またはアルカリ性薬液である、請求項1に記載の基板処理方法。
- 前記シリル化処理を行うためのシリル化剤は、分子内にシラザン結合(Si−N)を有する化合物である、請求項1に記載の基板処理方法。
- 前記分子内にシラザン結合を有する化合物は、TMDS(1,1,3,3-Tetramethyldisilazane)、TMSDMA(Dimethylaminotrimethylsilane)、およびDMSDMA(Dimethylsilyldimethylamine)から選択されたものである、請求項8に記載の基板処理方法。
- 前記基板のベークは、前記シリル化処理の際の温度よりも高い温度で行う、請求項1に記載の基板処理方法。
- 前記基板のベークは、150〜400℃で行う、請求項10に記載の基板処理方法。
- 前記変性された物質の溶解除去後のシリル化処理に先立ってベーク処理を行うことをさらに有する、請求項1に記載の基板処理方法。
- 基板上に形成された低誘電率膜の上に犠牲膜を形成することと、
前記犠牲膜の上にエッチングマスクを形成し、前記犠牲膜と前記低誘電率膜をエッチングして所定パターンを形成することと、
前記犠牲膜と前記エッチングマスクを所定の液に可溶化するように変性させることと、
前記所定の液を供給して前記変性された物質を溶解除去することと、
次いで、前記変性された物質の溶解除去後の低誘電率膜の表面にシリル化剤を供給してシリル化処理することと、
前記シリル化処理の後、基板をベークすることと
を有する基板処理方法。 - 前記残存する物質を変性させた後、前記変性された物質を溶解除去する前に、前記パターンが形成された低誘電率膜の表面にシリル化剤を供給してシリル化処理することをさらに有する、請求項13に記載の基板処理方法。
- 前記低誘電率膜は、ポーラス低誘電率材料からなる、請求項13記載の基板処理方法。
- 前記低誘電率膜は、アルキル基を末端基として有する、請求項13に記載の基板処理方法。
- 前記残存する物質の変性は、水蒸気とオゾンを含む処理ガスを供給して行う、請求項13に記載の基板処理方法。
- 前記残存する物質の変性は、オゾンを含む処理ガスを供給して行う、請求項13に記載の基板処理方法。
- 前記所定の液は、酸性またはアルカリ性薬液である、請求項13に記載の基板処理方法。
- 前記シリル化処理を行うためのシリル化剤は、分子内にシラザン結合(Si−N)を有する化合物である、請求項13に記載の基板処理方法。
- 前記分子内にシラザン結合を有する化合物は、TMDS(1,1,3,3-Tetramethyldisilazane)、TMSDMA(Dimethylaminotrimethylsilane)、およびDMSDMA(Dimethylsilyldimethylamine)から選択されたものである、請求項20に記載の基板処理方法。
- 前記基板のベークは、前記シリル化処理の際の温度よりも高い温度で行う、請求項13に記載の基板処理方法。
- 前記基板のベークは、150〜400℃で行う、請求項22に記載の基板処理方法。
- 前記変性された物質の溶解除去後のシリル化処理に先立ってベーク処理を行うことをさらに有する、請求項13に記載の基板処理方法。
- 被エッチング膜を有し、エッチング処理により被エッチング膜に所定パターンが形成され、エッチング処理後に残存する物質が所定の液に対して可溶化するように変性され、さらに前記所定の液により前記変性された物質が溶解除去された基板に対し、被エッチング膜の表面にシリル化剤を供給してシリル化処理することと、
前記シリル化処理の後、基板をベークすることと
を有する基板処理方法。 - コンピュータ上で動作し、基板処理装置を制御するためのプログラムが記憶された記憶媒体であって、
前記プログラムは、実行時に、
基板上に形成された低誘電率膜をエッチング処理して所定パターンを形成することと、
前記エッチング処理を終了した後に残存する物質を所定の液に対して可溶化するように変性させることと、
前記所定の液を供給して前記変性された物質を溶解除去することと、
次いで、前記変性された物質の溶解除去後の低誘電率膜の表面にシリル化剤を供給してシリル化処理することと、
前記シリル化処理の後、基板をベークすることと
を有する基板処理方法が行われるように、コンピュータに前記基板処理装置を制御させる、記憶媒体。 - コンピュータ上で動作し、基板処理装置を制御するためのプログラムが記憶された記憶媒体であって、
前記プログラムは、実行時に、
コンピュータ上で動作し、基板処理装置を制御するためのプログラムが記憶された記憶媒体であって、
前記プログラムは、実行時に、
犠牲膜の上にエッチングマスクを形成し、前記犠牲膜と前記低誘電率膜をエッチングして所定パターンを形成することと、
前記犠牲膜と前記エッチングマスクを所定の液に可溶化するように変性させることと、
前記所定の液を供給して前記変性された物質を溶解除去することと、
次いで、前記変性された物質の溶解除去後の低誘電率膜の表面にシリル化剤を供給してシリル化処理することと、
前記シリル化処理の後、基板をベークすることと
を有する基板処理方法が行われるように、コンピュータに前記基板処理装置を制御させる、記憶媒体。 - コンピュータ上で動作し、基板処理装置を制御するためのプログラムが記憶された記憶媒体であって、
前記プログラムは、実行時に、
コンピュータ上で動作し、基板処理装置を制御するためのプログラムが記憶された記憶媒体であって、
前記プログラムは、実行時に、
被エッチング膜を有し、エッチング処理により被エッチング膜に所定パターンが形成され、エッチング処理後に残存する物質が所定の液に対して可溶化するように変性され、さらに前記所定の液により前記変性された物質が溶解除去された基板に対し、被エッチング膜の表面にシリル化剤を供給してシリル化処理することと、
前記シリル化処理の後、基板をベークすることと
を有する基板処理方法が行われるように、コンピュータに前記基板処理装置を制御させる、記憶媒体。
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JP2006114719A (ja) * | 2004-10-15 | 2006-04-27 | Jsr Corp | 表面疎水化用組成物、表面疎水化方法、半導体装置およびその製造方法 |
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JP2006114719A (ja) * | 2004-10-15 | 2006-04-27 | Jsr Corp | 表面疎水化用組成物、表面疎水化方法、半導体装置およびその製造方法 |
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