JPS6491229A - Adder - Google Patents

Adder

Info

Publication number
JPS6491229A
JPS6491229A JP24870287A JP24870287A JPS6491229A JP S6491229 A JPS6491229 A JP S6491229A JP 24870287 A JP24870287 A JP 24870287A JP 24870287 A JP24870287 A JP 24870287A JP S6491229 A JPS6491229 A JP S6491229A
Authority
JP
Japan
Prior art keywords
adder
bit
code bit
augend
addend
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24870287A
Other languages
Japanese (ja)
Inventor
Kunihiko Fujii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP24870287A priority Critical patent/JPS6491229A/en
Publication of JPS6491229A publication Critical patent/JPS6491229A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To correct a code bit without increasing a circuit scale by adding an inverting circuit to the N-th bit full adder at the N-th bit arithmetic. CONSTITUTION:A full adder 1 outputs the sum and the carry with an augend Ai, an addend Bi and carry Ci-1 received from a low-order digit defined as inputs. A code bit full adder 3 is obtained by adding an inverting circuit to the Ci-1 input of the adder 1. An adder consist of these adders 1 and the adder 3. In such a constitution, the code bit Cn outputted from the adder 3 is coincident with the An or Bn when the augend A and the addend B have the same codes (Ab=Bn). While the Cn is coincident with the Sn outputted from the adder 3 when the A and B are not equal (Annot equal to Bn). Thus said adder of a small circuit scale can correct the Cn.
JP24870287A 1987-10-01 1987-10-01 Adder Pending JPS6491229A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24870287A JPS6491229A (en) 1987-10-01 1987-10-01 Adder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24870287A JPS6491229A (en) 1987-10-01 1987-10-01 Adder

Publications (1)

Publication Number Publication Date
JPS6491229A true JPS6491229A (en) 1989-04-10

Family

ID=17182061

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24870287A Pending JPS6491229A (en) 1987-10-01 1987-10-01 Adder

Country Status (1)

Country Link
JP (1) JPS6491229A (en)

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