GB1422322A - Binary processor - Google Patents

Binary processor

Info

Publication number
GB1422322A
GB1422322A GB4940971A GB4940971A GB1422322A GB 1422322 A GB1422322 A GB 1422322A GB 4940971 A GB4940971 A GB 4940971A GB 4940971 A GB4940971 A GB 4940971A GB 1422322 A GB1422322 A GB 1422322A
Authority
GB
United Kingdom
Prior art keywords
stage
stages
code
operands
decimal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB4940971A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
WLADSCHMIDT F
Original Assignee
WLADSCHMIDT F
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by WLADSCHMIDT F filed Critical WLADSCHMIDT F
Priority to GB4940971A priority Critical patent/GB1422322A/en
Publication of GB1422322A publication Critical patent/GB1422322A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/492—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination
    • G06F7/4925—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/491—Indexing scheme relating to groups G06F7/491 - G06F7/4917
    • G06F2207/4915—Using 4221 code, i.e. binary coded decimal representation with digit weight of 4, 2, 2 and 1 respectively
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/491—Indexing scheme relating to groups G06F7/491 - G06F7/4917
    • G06F2207/4916—Using 5211 code, i.e. binary coded decimal representation with digit weight of 5, 2, 1 and 1 respectively

Landscapes

  • Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Detection And Correction Of Errors (AREA)

Abstract

1422322 Binary arithmetic units F WALDSCHMIDT 2 Jan 1973 [25 Oct 1971 (2)] 49409/71 and 49410/71 Heading G4A A parallel adder for decimal numbers whose digits are represented by operands in 5211 or 4221 code includes groups of four full binary adder stages. For any one group of stages A4, A3, A2, A1 (A4 most significant) the weighting of the bits applied to stages A3, A2, A1 respectively is in the ratio 2 : 1 : 1. To correct the error that would otherwise occur when there is a carry bit into one or the other, but not both, of stages A4 and A1 the output of stage A1 is forced to the value where Z4 is the carry into stage A4, Z1 is the carry into stage A1 and X1, Y1 are the operand bits applied to stage A1. The two operands must be respectively in the A and B form of the relevant code. In the case of 5211 code the operands applied to any one group represent like-ordered decimal digits of the numbers to be added. In the case of 4221 code each operand applied to a group represents the least significant bit of the 4-bit word representing one decimal digit and the three most significant bits of the word representing the decimal digit of next lower order. Subtraction may be performed by adding the 9's-complement. The circuitry (not described) may be integrated.
GB4940971A 1971-10-25 1971-10-25 Binary processor Expired GB1422322A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB4940971A GB1422322A (en) 1971-10-25 1971-10-25 Binary processor

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB4940971A GB1422322A (en) 1971-10-25 1971-10-25 Binary processor
GB4941071 1971-10-25

Publications (1)

Publication Number Publication Date
GB1422322A true GB1422322A (en) 1976-01-28

Family

ID=26266474

Family Applications (1)

Application Number Title Priority Date Filing Date
GB4940971A Expired GB1422322A (en) 1971-10-25 1971-10-25 Binary processor

Country Status (1)

Country Link
GB (1) GB1422322A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112926287A (en) * 2021-03-10 2021-06-08 南京航空航天大学 Decimal to binary number converter based on tree compression
CN113014265A (en) * 2021-02-22 2021-06-22 南京航空航天大学 Binary system to decimal number converter based on tree-shaped compression

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113014265A (en) * 2021-02-22 2021-06-22 南京航空航天大学 Binary system to decimal number converter based on tree-shaped compression
CN113014265B (en) * 2021-02-22 2024-01-02 南京航空航天大学 Binary to decimal number converter based on tree compression
CN112926287A (en) * 2021-03-10 2021-06-08 南京航空航天大学 Decimal to binary number converter based on tree compression
CN112926287B (en) * 2021-03-10 2024-01-30 南京航空航天大学 Decimal-to-binary number converter based on tree compression

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees