GB1274155A - Electronic system for use in calculators - Google Patents

Electronic system for use in calculators

Info

Publication number
GB1274155A
GB1274155A GB59054/70A GB5905470A GB1274155A GB 1274155 A GB1274155 A GB 1274155A GB 59054/70 A GB59054/70 A GB 59054/70A GB 5905470 A GB5905470 A GB 5905470A GB 1274155 A GB1274155 A GB 1274155A
Authority
GB
United Kingdom
Prior art keywords
register
adder
fed
digits
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB59054/70A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Publication of GB1274155A publication Critical patent/GB1274155A/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491Computations with decimal numbers radix 12 or 20.
    • G06F7/492Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination
    • G06F7/493Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination the representation being the natural binary coded representation, i.e. 8421-code
    • G06F7/494Adding; Subtracting
    • G06F7/495Adding; Subtracting in digit-serial fashion, i.e. having a single digit-handling circuit treating all denominations after each other
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/02Digital computers in general; Data processing equipment in general manually operated with input through keyboard and computation using a built-in program, e.g. pocket calculators

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Mathematical Analysis (AREA)
  • Computer Hardware Design (AREA)
  • Complex Calculations (AREA)
  • Calculators And Similar Devices (AREA)

Abstract

1,274,155. Digital calculator. OMRON TATEISI ELECTRONICS CO. 11 Dec., 1970 [15 Dec., 1969], No. 59054/70. Heading G4A. Digital calculator using binary coded decimal digits obtains the nines complements of digits for use in subtraction by using an inverter fed by an adder receiving a digit to be complemented and pulses representing the digits + 5 and + 1. The calculator has shift registers 1, 2, 3 each holding the same number of digits, i.e. 12 digits each of 4 bits. Registers 1 and 2 are coupled in series by gates and register 2 feeds an adder 5 via gates. Register 3 feeds the adder and can receive data from the adder directly or via an inverter 31 and from register 2. Each register can circulate data and register 1 can receive data from a keyboard. A four bit register 4 can be used to shift data to the left or most significant position and a four bit stage 26 of register 2 can be used to shift data to the right. To obtain a nines complement data from register 3 is fed to the adder and pulses representing binary 5 are fed to the adder. For all but the least significant digit a pulse representing binary 1 is also fed to the adder. The sum is fed to inverter 31. Multiplication and division can be performed by successive addition or subtraction.
GB59054/70A 1969-12-15 1970-12-11 Electronic system for use in calculators Expired GB1274155A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP44101159A JPS5036542B1 (en) 1969-12-15 1969-12-15

Publications (1)

Publication Number Publication Date
GB1274155A true GB1274155A (en) 1972-05-17

Family

ID=14293252

Family Applications (1)

Application Number Title Priority Date Filing Date
GB59054/70A Expired GB1274155A (en) 1969-12-15 1970-12-11 Electronic system for use in calculators

Country Status (6)

Country Link
US (1) US3707622A (en)
JP (1) JPS5036542B1 (en)
DE (1) DE2060590A1 (en)
FR (1) FR2073721A5 (en)
GB (1) GB1274155A (en)
ZA (1) ZA708435B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5235264B2 (en) * 1971-09-29 1977-09-08
GB1415322A (en) * 1971-12-21 1975-11-26 Omron Tateisi Electronics Co Data processing device
JPS5219746B2 (en) * 1971-12-24 1977-05-30
FR2291542A1 (en) * 1974-01-07 1976-06-11 Cii CHARACTER OPERATOR WORKING IN BINARY DECIMALS
GB1510588A (en) * 1975-06-02 1978-05-10 Polsky J Sequential computing system
US7071908B2 (en) 2003-05-20 2006-07-04 Kagutech, Ltd. Digital backplane

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL227350A (en) * 1957-04-30
US3249745A (en) * 1962-01-09 1966-05-03 Monroe Int Two-register calculator for performing multiplication and division using identical operational steps
US3551663A (en) * 1965-04-15 1970-12-29 Gen Electric Multiplication apparatus in a data processing system with a variable length multiplier
US3564226A (en) * 1966-12-27 1971-02-16 Digital Equipment Parallel binary processing system having minimal operational delay
US3564222A (en) * 1968-07-01 1971-02-16 Bendix Corp Digital function generator solving the equation f(x) {32 {0 mx {30 {0 b

Also Published As

Publication number Publication date
ZA708435B (en) 1971-09-29
FR2073721A5 (en) 1971-10-01
JPS5036542B1 (en) 1975-11-26
DE2060590A1 (en) 1971-06-24
US3707622A (en) 1972-12-26

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee