JPS5595148A - Binary arithmetic circuit - Google Patents
Binary arithmetic circuitInfo
- Publication number
- JPS5595148A JPS5595148A JP210679A JP210679A JPS5595148A JP S5595148 A JPS5595148 A JP S5595148A JP 210679 A JP210679 A JP 210679A JP 210679 A JP210679 A JP 210679A JP S5595148 A JPS5595148 A JP S5595148A
- Authority
- JP
- Japan
- Prior art keywords
- digit
- contents
- inputted
- value
- multiplier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
PURPOSE: To improve processing speeds of absolute-value arithmetic, multiplication and division by making use of the uppermost digit of a data register, the lowermost digit of a multiplier register and the content of a carry output memory unit for a single microinstruction as an arithmetic basic step.
CONSTITUTION: Under the control of logic circuit 36, the contents of 1st to 3rd registers R29, R30 and R31 are selected by selectors 32 and 33 by a μ-instruction from microinstruction memory unit 7 and are inputted to binary parallel adder 5 and the arithmetic result of adder 5 is outputted. For absolute-value addition, the contents or inversion values of R29 and R30 or "0" are selected by selectors 32 and 33 corresponding to the uppermost-digit values of R29 and R30. For multiplication, a multiplicand and multiplier are inputted to R29 and 3rd 31 respectively and initial value "0" is to R30. Corresponding to the lowermost-digit value of R31, addition results of respective digits between the multiplier and multiplicand are outputted and shifters 34 and 35 are brought under control to shift the contents of R30 and R31 as many times as the number of digits. For division, a divisor is inputted to R29, and dividends with digits twice are to R30 and R31 to attain substraction of each digit and control over shifters 34 and 35 corresponding to the contents of a carry output memory unit.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54002106A JPS6029977B2 (en) | 1979-01-10 | 1979-01-10 | binary arithmetic circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP54002106A JPS6029977B2 (en) | 1979-01-10 | 1979-01-10 | binary arithmetic circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5595148A true JPS5595148A (en) | 1980-07-19 |
| JPS6029977B2 JPS6029977B2 (en) | 1985-07-13 |
Family
ID=11520087
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP54002106A Expired JPS6029977B2 (en) | 1979-01-10 | 1979-01-10 | binary arithmetic circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6029977B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS588352A (en) * | 1981-07-06 | 1983-01-18 | Toshiba Corp | Dividing circuit |
| JPS5844537A (en) * | 1981-09-11 | 1983-03-15 | Hitachi Ltd | Decimal dividing device |
| JPS58132837A (en) * | 1982-02-03 | 1983-08-08 | Hitachi Ltd | Divider |
| JPS60225253A (en) * | 1984-04-23 | 1985-11-09 | Nec Corp | Information processing device |
| JPS61101835A (en) * | 1984-10-23 | 1986-05-20 | Matsushita Electric Ind Co Ltd | Division circuit |
-
1979
- 1979-01-10 JP JP54002106A patent/JPS6029977B2/en not_active Expired
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS588352A (en) * | 1981-07-06 | 1983-01-18 | Toshiba Corp | Dividing circuit |
| JPS626258B2 (en) * | 1981-07-06 | 1987-02-09 | Tokyo Shibaura Electric Co | |
| JPS5844537A (en) * | 1981-09-11 | 1983-03-15 | Hitachi Ltd | Decimal dividing device |
| JPS6244660B2 (en) * | 1981-09-11 | 1987-09-22 | Hitachi Ltd | |
| JPS58132837A (en) * | 1982-02-03 | 1983-08-08 | Hitachi Ltd | Divider |
| JPS6248857B2 (en) * | 1982-02-03 | 1987-10-15 | Hitachi Ltd | |
| JPS60225253A (en) * | 1984-04-23 | 1985-11-09 | Nec Corp | Information processing device |
| JPS61101835A (en) * | 1984-10-23 | 1986-05-20 | Matsushita Electric Ind Co Ltd | Division circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6029977B2 (en) | 1985-07-13 |
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