JPS6490574A - Formation of superconductor wiring - Google Patents

Formation of superconductor wiring

Info

Publication number
JPS6490574A
JPS6490574A JP62248773A JP24877387A JPS6490574A JP S6490574 A JPS6490574 A JP S6490574A JP 62248773 A JP62248773 A JP 62248773A JP 24877387 A JP24877387 A JP 24877387A JP S6490574 A JPS6490574 A JP S6490574A
Authority
JP
Japan
Prior art keywords
superconductor
layer
wiring
shaped
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62248773A
Other languages
Japanese (ja)
Inventor
Tadashi Sugihara
Takuo Takeshita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Metal Corp
Original Assignee
Mitsubishi Metal Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Metal Corp filed Critical Mitsubishi Metal Corp
Priority to JP62248773A priority Critical patent/JPS6490574A/en
Priority to EP19880908375 priority patent/EP0338084A4/en
Priority to PCT/JP1988/000987 priority patent/WO1989003127A1/en
Publication of JPS6490574A publication Critical patent/JPS6490574A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49888Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials the conductive materials containing superconducting material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53285Conductive materials containing superconducting materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0268Manufacture or treatment of devices comprising copper oxide
    • H10N60/0661Processes performed after copper oxide formation, e.g. patterning
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N60/00Superconducting devices
    • H10N60/01Manufacture or treatment
    • H10N60/0268Manufacture or treatment of devices comprising copper oxide
    • H10N60/0772Processes including the use of non-gaseous precursors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Compositions Of Oxide Ceramics (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Superconductors And Manufacturing Methods Therefor (AREA)

Abstract

PURPOSE:To control the characteristics of a superconductor substance accurately by determining the composition of a copper oxide constituting the superconductor substance by a forming process for a wiring. CONSTITUTION:A source electrode 15 and a drain electrode 17 formed by a superconductor are faced oppositely to the surface of a semiconductor substrate 12 from which one part of an insulating layer 13 is exposed. A gate electrode consisting of a superconductor composed of either one or a plurality of a scandium element, an yttrium element and a lanthanoid element and either one of alkali earth metals or a plurality of copper elements is shaped onto an insulating layer 19. That is, an insulating layer 21 under an amorphous state is formed onto the insulating layer 19. A photo-resist is applied onto the wiring layer 21 and a photo-resist layer 23 is shaped, and the photo-resist layer 23 is pattern- formed and a mask layer 25 is shaped. When the mask layer 25 is formed, the wiring layer 21 is removed selectively through reactive ion etching, and a wiring body 27 having a specified pattern is shaped. The mask layer 25 is gotten rid of, and oxygen ions are implanted to the wiring body exposed. Accordingly, a wiring composed of a superconductor substance having a desired composition, the superconductor having desired characteristics, is acquired.
JP62248773A 1987-09-30 1987-09-30 Formation of superconductor wiring Pending JPS6490574A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP62248773A JPS6490574A (en) 1987-09-30 1987-09-30 Formation of superconductor wiring
EP19880908375 EP0338084A4 (en) 1987-09-30 1988-09-28 Structure of superconductor wiring and process for its formation.
PCT/JP1988/000987 WO1989003127A1 (en) 1987-09-30 1988-09-28 Structure of superconductor wiring and process for its formation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62248773A JPS6490574A (en) 1987-09-30 1987-09-30 Formation of superconductor wiring

Publications (1)

Publication Number Publication Date
JPS6490574A true JPS6490574A (en) 1989-04-07

Family

ID=17183169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62248773A Pending JPS6490574A (en) 1987-09-30 1987-09-30 Formation of superconductor wiring

Country Status (1)

Country Link
JP (1) JPS6490574A (en)

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