JPS6487305A - Method for dicing semiconductor wafer - Google Patents

Method for dicing semiconductor wafer

Info

Publication number
JPS6487305A
JPS6487305A JP24833087A JP24833087A JPS6487305A JP S6487305 A JPS6487305 A JP S6487305A JP 24833087 A JP24833087 A JP 24833087A JP 24833087 A JP24833087 A JP 24833087A JP S6487305 A JPS6487305 A JP S6487305A
Authority
JP
Japan
Prior art keywords
wafer
dicing
reverse side
dicing saw
breaking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24833087A
Other languages
Japanese (ja)
Inventor
Mamoru Kajiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP24833087A priority Critical patent/JPS6487305A/en
Publication of JPS6487305A publication Critical patent/JPS6487305A/en
Pending legal-status Critical Current

Links

Landscapes

  • Processing Of Stones Or Stones Resemblance Materials (AREA)
  • Dicing (AREA)

Abstract

PURPOSE:To make the amount left uncut smaller even when the thickness of a wafer is thicker than ever and consequently reduce the frequency of occurrence of pellet cracking at breaking by a method wherein the breaking is done after dicing grooves are made on both the obverse side and reverse side of the wafer. CONSTITUTION:The scribing lines of a wafer 13, on which semiconductor elements are made, are aligned so as to be parallel or perpendicular to shifting directions of an obverse side dicing saw 11A and of a reverse side dicing saw 11B. Under the condition as described above, the wafer 13 is placed on four stages 14A-14D and sucked to the stages so as to simultaneously make dicing grooves 18A and 18B at the scribing lines on the obverse side and reverse side of the wafer 13 by moving the obverse side dicing saw 11A and the reverse side dicing saw 11B along dividing parts. After the dicing grooves are formed on all the scribing lines to dice, the wafer is transferred to an electron seat so as to carry out a breaking process.
JP24833087A 1987-09-30 1987-09-30 Method for dicing semiconductor wafer Pending JPS6487305A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24833087A JPS6487305A (en) 1987-09-30 1987-09-30 Method for dicing semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24833087A JPS6487305A (en) 1987-09-30 1987-09-30 Method for dicing semiconductor wafer

Publications (1)

Publication Number Publication Date
JPS6487305A true JPS6487305A (en) 1989-03-31

Family

ID=17176478

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24833087A Pending JPS6487305A (en) 1987-09-30 1987-09-30 Method for dicing semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS6487305A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6583032B1 (en) * 1999-11-05 2003-06-24 Tokyo Seimitsu Co., Ltd. Method for manufacturing semiconductor chips
JP2008187148A (en) * 2007-01-31 2008-08-14 Fuji Electric Device Technology Co Ltd Manufacturing method of semiconductor device and marking device
JP2012227371A (en) * 2011-04-20 2012-11-15 Disco Abrasive Syst Ltd Processing method of package substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6583032B1 (en) * 1999-11-05 2003-06-24 Tokyo Seimitsu Co., Ltd. Method for manufacturing semiconductor chips
JP2008187148A (en) * 2007-01-31 2008-08-14 Fuji Electric Device Technology Co Ltd Manufacturing method of semiconductor device and marking device
JP2012227371A (en) * 2011-04-20 2012-11-15 Disco Abrasive Syst Ltd Processing method of package substrate

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