JPS57133647A - Method for separating chip from semiconductor wafer - Google Patents
Method for separating chip from semiconductor waferInfo
- Publication number
- JPS57133647A JPS57133647A JP1804981A JP1804981A JPS57133647A JP S57133647 A JPS57133647 A JP S57133647A JP 1804981 A JP1804981 A JP 1804981A JP 1804981 A JP1804981 A JP 1804981A JP S57133647 A JPS57133647 A JP S57133647A
- Authority
- JP
- Japan
- Prior art keywords
- slot
- area
- wafer
- cut
- high density
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Dicing (AREA)
Abstract
PURPOSE:To restrain the diffusion of crack or transposition resulting from dicing by a method wherein a high density impurity area is formed in the prearranged area for separating slot or along the both sides of the slot and a separating slot is cut by means of a dicing blade and the like when a chip is separated from a wafer. CONSTITUTION:An area to be divided into chips is set up in a semiconductor wafer 41 whereon a slot is cut by means of a diamond blade and the like to divide the wafer into chips by bending the said wafer 41. At this time, the impurities are diffused in the prearranged area for separating slot from the wafer surface to form a high density impurity area 51 wherein a slot is cut by means of thrusting a blade at the central part thereof. Otherwise, another high density impurity area 52 is formed at both sides of the separating slot and a blade is pressed on the area surrounded by the areas 52 to cut the slot which is compressed by a roller and the like to divide the slot into individual chips. Through these procedures, the crack and the like resulting from dicing may be absorbed into said high density area to prevent the crack and the like from difusing in the active element area in chips.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1804981A JPS57133647A (en) | 1981-02-12 | 1981-02-12 | Method for separating chip from semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1804981A JPS57133647A (en) | 1981-02-12 | 1981-02-12 | Method for separating chip from semiconductor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57133647A true JPS57133647A (en) | 1982-08-18 |
Family
ID=11960832
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1804981A Pending JPS57133647A (en) | 1981-02-12 | 1981-02-12 | Method for separating chip from semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57133647A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5691248A (en) * | 1995-07-26 | 1997-11-25 | International Business Machines Corporation | Methods for precise definition of integrated circuit chip edges |
US5705425A (en) * | 1992-05-28 | 1998-01-06 | Fujitsu Limited | Process for manufacturing semiconductor devices separated by an air-bridge |
-
1981
- 1981-02-12 JP JP1804981A patent/JPS57133647A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5705425A (en) * | 1992-05-28 | 1998-01-06 | Fujitsu Limited | Process for manufacturing semiconductor devices separated by an air-bridge |
US5691248A (en) * | 1995-07-26 | 1997-11-25 | International Business Machines Corporation | Methods for precise definition of integrated circuit chip edges |
US5925924A (en) * | 1995-07-26 | 1999-07-20 | International Business Machines Corporation | Methods for precise definition of integrated circuit chip edges |
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