JPS5759334A - Method for cutting of semiconductor wafer - Google Patents

Method for cutting of semiconductor wafer

Info

Publication number
JPS5759334A
JPS5759334A JP13490380A JP13490380A JPS5759334A JP S5759334 A JPS5759334 A JP S5759334A JP 13490380 A JP13490380 A JP 13490380A JP 13490380 A JP13490380 A JP 13490380A JP S5759334 A JPS5759334 A JP S5759334A
Authority
JP
Japan
Prior art keywords
distortion
crystal
wafer
supersonic waves
cutting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13490380A
Other languages
Japanese (ja)
Inventor
Masaru Wada
Kunio Ito
Takashi Sugino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP13490380A priority Critical patent/JPS5759334A/en
Publication of JPS5759334A publication Critical patent/JPS5759334A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • H01L21/3043Making grooves, e.g. cutting

Abstract

PURPOSE:To increase the reliability of a semiconductor element by a method wherein supersonic waves are applied to the blade which comes in contact with the semiconductor single crystal wafer and the cleavage of the wafer, having small crystal distortion, is formed at a plurality of spots simultaneously. CONSTITUTION:The blade 2 of a knife is brought into contact with the circumferential section of a (100) GaAs single crystal wafer 1 and, at the same time, the supersonic waves generated by the supersonic waves generator 3 are applied to the above. A cleavage is easily formed without having a distortion on the crystal. Accordingly, the cleavages having no distortion on the crystal can be formed at two spots or more simultaneously.
JP13490380A 1980-09-27 1980-09-27 Method for cutting of semiconductor wafer Pending JPS5759334A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13490380A JPS5759334A (en) 1980-09-27 1980-09-27 Method for cutting of semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13490380A JPS5759334A (en) 1980-09-27 1980-09-27 Method for cutting of semiconductor wafer

Publications (1)

Publication Number Publication Date
JPS5759334A true JPS5759334A (en) 1982-04-09

Family

ID=15139213

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13490380A Pending JPS5759334A (en) 1980-09-27 1980-09-27 Method for cutting of semiconductor wafer

Country Status (1)

Country Link
JP (1) JPS5759334A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1239310A2 (en) * 2001-02-22 2002-09-11 Nec Corporation Semiconductor chip having an arrayed waveguide grating and method of manufacturing the semiconductor chip, and module containing the semiconductor chip
JP2009054718A (en) * 2007-08-24 2009-03-12 Fuji Electric Device Technology Co Ltd Production method of semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1239310A2 (en) * 2001-02-22 2002-09-11 Nec Corporation Semiconductor chip having an arrayed waveguide grating and method of manufacturing the semiconductor chip, and module containing the semiconductor chip
EP1239310A3 (en) * 2001-02-22 2004-02-25 Nec Corporation Semiconductor chip having an arrayed waveguide grating and method of manufacturing the semiconductor chip, and module containing the semiconductor chip
EP2083292A2 (en) * 2001-02-22 2009-07-29 NEC Corporation Semiconductor chip having an arrayed waveguide grating and method of manufacturing the semiconductor chip, and module containing the semiconductor chip
EP2083292A3 (en) * 2001-02-22 2009-10-28 NEC Corporation Semiconductor chip having an arrayed waveguide grating and method of manufacturing the semiconductor chip, and module containing the semiconductor chip
JP2009054718A (en) * 2007-08-24 2009-03-12 Fuji Electric Device Technology Co Ltd Production method of semiconductor device

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