JPS6486550A - Complementary mos integrated circuit - Google Patents

Abstract

PURPOSE:To improve the degree of integration in a CMOS-IC by forming a V-shaped trench in a P<->-N<-> joint surface and reducing the wasteful area of the surface of a P<-> junction while applying the trench for isolation of elements. CONSTITUTION:A substrate is cut off to a V shape in the vicinity of the surface of a P<->-N<-> junction, and sections, concentration of which is lowered due to the lateral spread of a diffusion and through which depletion layers are easy to be extended, are removed while there is no mutual depletion layer in the horizontal direction, thus reducing the generation of the contacts of the depletion layers, then extremely diminishing the minimum value of Wp-N. There is no section, concentration of which is lowered in the cross direction, in a P<-> layer 10, and the spread of a depletion layer 17 in an N<+> layer 14 and a depletion layer 16 from the P<-> layer 10 are brought respectively to approximately 2mum. The spread of a depletion layer 15 from a P<+> layer 11 and the depletion layer 16 from a P<->-N<-> boundary is brought separately to approximately 3mum, but both layers 15, 16 may be isolated only by 2mum at a horizontal distance equivalently owing to V-shaped structure. The structure resists mask displacement owing to V-shaped structure, thus allowing 6mum at the minimum value of Wp-N.