JPS64851B2 - - Google Patents

Info

Publication number
JPS64851B2
JPS64851B2 JP57201211A JP20121182A JPS64851B2 JP S64851 B2 JPS64851 B2 JP S64851B2 JP 57201211 A JP57201211 A JP 57201211A JP 20121182 A JP20121182 A JP 20121182A JP S64851 B2 JPS64851 B2 JP S64851B2
Authority
JP
Japan
Prior art keywords
terminal
node
junction
input
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57201211A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5991727A (ja
Inventor
Nobuo Kodera
Juichi Nishino
Yutaka Harada
Hideaki Nakane
Juji Hatano
Kunio Yamashita
Ushio Kawabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP57201211A priority Critical patent/JPS5991727A/ja
Publication of JPS5991727A publication Critical patent/JPS5991727A/ja
Publication of JPS64851B2 publication Critical patent/JPS64851B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/195—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices
    • H03K19/1954—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices with injection of the control current
    • H03K19/1956—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using superconductive devices with injection of the control current using an inductorless circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Superconductor Devices And Manufacturing Methods Thereof (AREA)
  • Logic Circuits (AREA)
JP57201211A 1982-11-18 1982-11-18 ３接合電流注入型ジヨセフソン論理回路 Granted JPS5991727A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57201211A JPS5991727A (ja) 1982-11-18 1982-11-18 ３接合電流注入型ジヨセフソン論理回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57201211A JPS5991727A (ja) 1982-11-18 1982-11-18 ３接合電流注入型ジヨセフソン論理回路

Publications (2)

Publication Number Publication Date
JPS5991727A JPS5991727A (ja) 1984-05-26
JPS64851B2 true JPS64851B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1989-01-09

Family

ID=16437187

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57201211A Granted JPS5991727A (ja) 1982-11-18 1982-11-18 ３接合電流注入型ジヨセフソン論理回路

Country Status (1)

Country Link
JP (1) JPS5991727A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59188235A (ja) * 1983-04-11 1984-10-25 Nec Corp ジヨセフソン効果を用いた電流注入型論理ゲ−ト回路
US5233243A (en) * 1991-08-14 1993-08-03 Westinghouse Electric Corp. Superconducting push-pull flux quantum logic circuits

Also Published As

Publication number Publication date
JPS5991727A (ja) 1984-05-26

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