JPS6484666A - Manufacture of high melting metal silicide gate mosfet - Google Patents

Manufacture of high melting metal silicide gate mosfet

Info

Publication number
JPS6484666A
JPS6484666A JP62240669A JP24066987A JPS6484666A JP S6484666 A JPS6484666 A JP S6484666A JP 62240669 A JP62240669 A JP 62240669A JP 24066987 A JP24066987 A JP 24066987A JP S6484666 A JPS6484666 A JP S6484666A
Authority
JP
Japan
Prior art keywords
oxide film
normal pressure
substrate
film
implanted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62240669A
Other languages
Japanese (ja)
Inventor
Ryoichi Ito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP62240669A priority Critical patent/JPS6484666A/en
Publication of JPS6484666A publication Critical patent/JPS6484666A/en
Pending legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To protect a silicide film and an oxide film against peeling by a method wherein an oxide film is formed on a substrate provided with a high melting metal silicide film with an oxide film spacer formed on its side wall, and then the substrate is subjected to a heat treatment in an inactive gas atmosphere. CONSTITUTION:A LOCOS oxide film 2 and a gate oxide film 3 are formed on the surface of a substrate 1 and boron ions are implanted thereinto. Next, a tungsten silicide film 4 is formed, then an electrode is formed through a dry etching, and phosphorus ions are implanted. Then, a normal pressure oxide film is made to grow through a normal pressure CVD method, and thereafter a spacer 5 of a normal pressure oxide film is formed on the side wall of the tungsten silicide film 4 through an anisotropic etching. Then, arsenic ions are implanted so as to form a source and a drain diffusion layers, 6 and 7. Furthermore, a normal pressure oxide film B is made to grow through a normal CVD method, and a process follows, where the substrate 1 is subjected to a heat treatment in a N2 gas atmosphere for the formation of a MOSFET.
JP62240669A 1987-09-28 1987-09-28 Manufacture of high melting metal silicide gate mosfet Pending JPS6484666A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62240669A JPS6484666A (en) 1987-09-28 1987-09-28 Manufacture of high melting metal silicide gate mosfet

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62240669A JPS6484666A (en) 1987-09-28 1987-09-28 Manufacture of high melting metal silicide gate mosfet

Publications (1)

Publication Number Publication Date
JPS6484666A true JPS6484666A (en) 1989-03-29

Family

ID=17062941

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62240669A Pending JPS6484666A (en) 1987-09-28 1987-09-28 Manufacture of high melting metal silicide gate mosfet

Country Status (1)

Country Link
JP (1) JPS6484666A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100377458B1 (en) * 1994-09-28 2003-07-18 소니 가부시끼 가이샤 Formaton of gate electrode

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100377458B1 (en) * 1994-09-28 2003-07-18 소니 가부시끼 가이샤 Formaton of gate electrode

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