JPS6481361A - Manufacture of tunnel transistor - Google Patents
Manufacture of tunnel transistorInfo
- Publication number
- JPS6481361A JPS6481361A JP23739587A JP23739587A JPS6481361A JP S6481361 A JPS6481361 A JP S6481361A JP 23739587 A JP23739587 A JP 23739587A JP 23739587 A JP23739587 A JP 23739587A JP S6481361 A JPS6481361 A JP S6481361A
- Authority
- JP
- Japan
- Prior art keywords
- oxide film
- silicon
- superhigh vacuum
- substrate
- silicon oxide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Bipolar Transistors (AREA)
- Formation Of Insulating Films (AREA)
Abstract
PURPOSE:To form a silicon oxide film having good quality and to preferably control the thickness of the film by a reduced pressure oxidation by including the steps of presenting a silicon cleaned face in a superhigh vacuum chamber and introducing oxygen into the chamber to form a thin silicon oxide film by a thermal oxidizing method. CONSTITUTION:After boron is ion implanted to form a p-type silicon base layer 3 and a high concentration p-type silicon base contact layer 4, a substrate is cleaned and etched, and a thin oxide film is simultaneously formed. It is immediately contained in a superhigh vacuum chamber, the substrate is heated in the superhigh vacuum, the oxide film is evaporated to present a silicon cleaned face, and a silicon single crystalline face is flattened at an atomic layer level. Then, high purity oxygen is introduced into the superhigh vacuum chamber, the substrate is heated, and a thin silicon oxide film 5 is formed. Thereafter, after aluminum to become an emitter electrode 9 is deposited in the superhigh vacuum, it is discharged into the atmosphere, an emitter electrode 9 is formed by etching, and a silicon oxide film 6 is deposited by a CVD method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23739587A JPS6481361A (en) | 1987-09-24 | 1987-09-24 | Manufacture of tunnel transistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23739587A JPS6481361A (en) | 1987-09-24 | 1987-09-24 | Manufacture of tunnel transistor |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6481361A true JPS6481361A (en) | 1989-03-27 |
JPH0573353B2 JPH0573353B2 (en) | 1993-10-14 |
Family
ID=17014757
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP23739587A Granted JPS6481361A (en) | 1987-09-24 | 1987-09-24 | Manufacture of tunnel transistor |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6481361A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH022130A (en) * | 1988-06-14 | 1990-01-08 | Nippon Telegr & Teleph Corp <Ntt> | Method and device for forming silicon thermal oxide film |
WO2002073678A1 (en) * | 2001-03-10 | 2002-09-19 | Nanos Aps | Method for oxidation of a silicon substrate |
JP2006210564A (en) * | 2005-01-27 | 2006-08-10 | Matsushita Electric Ind Co Ltd | Manufacturing method of bipolar transistor and bipolar transistor manufactured therewith |
-
1987
- 1987-09-24 JP JP23739587A patent/JPS6481361A/en active Granted
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH022130A (en) * | 1988-06-14 | 1990-01-08 | Nippon Telegr & Teleph Corp <Ntt> | Method and device for forming silicon thermal oxide film |
WO2002073678A1 (en) * | 2001-03-10 | 2002-09-19 | Nanos Aps | Method for oxidation of a silicon substrate |
JP2006210564A (en) * | 2005-01-27 | 2006-08-10 | Matsushita Electric Ind Co Ltd | Manufacturing method of bipolar transistor and bipolar transistor manufactured therewith |
Also Published As
Publication number | Publication date |
---|---|
JPH0573353B2 (en) | 1993-10-14 |
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