JPS647805A - Constant-current circuit - Google Patents

Constant-current circuit

Info

Publication number
JPS647805A
JPS647805A JP62163436A JP16343687A JPS647805A JP S647805 A JPS647805 A JP S647805A JP 62163436 A JP62163436 A JP 62163436A JP 16343687 A JP16343687 A JP 16343687A JP S647805 A JPS647805 A JP S647805A
Authority
JP
Japan
Prior art keywords
fet
operational amplifier
current
resistor
vref2
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62163436A
Other languages
Japanese (ja)
Inventor
Yukiya Tanaka
Isao Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP62163436A priority Critical patent/JPS647805A/en
Publication of JPS647805A publication Critical patent/JPS647805A/en
Pending legal-status Critical Current

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  • Amplifiers (AREA)

Abstract

PURPOSE:To prevent the variance of a current value of a constant-current output by supplying a first reference voltage through a resistor to a drain of a first FET and a non-inversion input terminal of an operational amplifier, supplying the second reference voltage to an inversion input terminal of the operational amplifier, and supplying an output of the operational amplifier to a gate of the FET. CONSTITUTION:A negative feedback loop is formed by the first FET 11 and an operational amplifier 41, and by a virtual short circuit of both input terminals of the operational amplifier 41, a voltage of a non-inversion input terminal of the operational amplifier 41 becomes equal to the second reference voltage VREF2 supplied to its inversion input terminal, and a voltage of a terminal 21 being a connecting midpoint of a drain of the FET 11 and a resistor 31 also becomes VREF2. Both the reference voltages are in a relation of VREF1> VREF2, it is applied across the resistor 31, and a current flowing through the resistor 31, namely, a drain current I1 of the first FET 11 becomes VREF1-VREF2/R. In such a way, the drain current I1 is determined, irrespective of a threshold voltage Vth, and the variance of a constant-current I2 flowing to the second FET 12, by manufacturing lots is eliminated.
JP62163436A 1987-06-30 1987-06-30 Constant-current circuit Pending JPS647805A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62163436A JPS647805A (en) 1987-06-30 1987-06-30 Constant-current circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62163436A JPS647805A (en) 1987-06-30 1987-06-30 Constant-current circuit

Publications (1)

Publication Number Publication Date
JPS647805A true JPS647805A (en) 1989-01-11

Family

ID=15773855

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62163436A Pending JPS647805A (en) 1987-06-30 1987-06-30 Constant-current circuit

Country Status (1)

Country Link
JP (1) JPS647805A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001267926A (en) * 2000-03-22 2001-09-28 Kawasaki Steel Corp Digital-to-analog converter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001267926A (en) * 2000-03-22 2001-09-28 Kawasaki Steel Corp Digital-to-analog converter

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