JPS647474U - - Google Patents
Info
- Publication number
- JPS647474U JPS647474U JP10068187U JP10068187U JPS647474U JP S647474 U JPS647474 U JP S647474U JP 10068187 U JP10068187 U JP 10068187U JP 10068187 U JP10068187 U JP 10068187U JP S647474 U JPS647474 U JP S647474U
- Authority
- JP
- Japan
- Prior art keywords
- reference voltage
- capacitor
- generation circuit
- comparator
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 5
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
Description
第１図は本考案によるＡ／Ｄ変換装置の第１実
施例を示す回路構成図、第２図は本考案の第２実
施例を示す回路構成図、第３図は従来のＡ／Ｄ変
換装置の全体の構成を示すブロツク図、第４図は
第３図のコンパレータ部分の詳細を示す回路構成
図、第５図は第４図の回路において用いられるサ
ンプリングクロツクの波形図である。
１１〜１３，２２，２２ａ，２２ｂ……アナロ
グスイツチ、１４……コンデンサ、１５……イン
バータ、２１……基準電圧発生回路、２３ａ，２
３ｂ……，……コンパレータ。
Fig. 1 is a circuit diagram showing a first embodiment of an A/D conversion device according to the present invention, Fig. 2 is a circuit diagram showing a second embodiment of the invention, and Fig. 3 is a conventional A/D converter. 4 is a block diagram showing the overall configuration of the device, FIG. 4 is a circuit configuration diagram showing details of the comparator portion of FIG. 3, and FIG. 5 is a waveform diagram of the sampling clock used in the circuit of FIG. 4. 11-13, 22, 22a, 22b...Analog switch, 14...Capacitor, 15...Inverter, 21...Reference voltage generation circuit, 23a, 2
3b...,...Comparator.
Claims (1)
の基準電圧発生回路から出力される基準電圧をコ
ンデンサに蓄え、このコンデンサに蓄えた基準電
圧とアナログ入力信号とをクロツクに同期してレ
ベル比較するコンパレータを備えたＡ／Ｄ変換装
置において、上記コンパレータが比較動作するク
ロツクタイミング時に上記基準電圧発生回路の導
通を遮断するスイツチ手段を設けたことを特徴と
するＡ／Ｄ変換装置。 A reference voltage generation circuit that generates a reference voltage, and a comparator that stores the reference voltage output from this reference voltage generation circuit in a capacitor and compares the levels of the reference voltage stored in this capacitor and an analog input signal in synchronization with a clock. An A/D converter comprising: a switch means for cutting off conduction of the reference voltage generating circuit at a clock timing when the comparator performs a comparison operation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10068187U JPS647474U (en) | 1987-06-30 | 1987-06-30 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10068187U JPS647474U (en) | 1987-06-30 | 1987-06-30 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS647474U true JPS647474U (en) | 1989-01-17 |
Family
ID=31328974
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10068187U Pending JPS647474U (en) | 1987-06-30 | 1987-06-30 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS647474U (en) |
-
1987
- 1987-06-30 JP JP10068187U patent/JPS647474U/ja active Pending