JPS6185933U - - Google Patents
Info
- Publication number
- JPS6185933U JPS6185933U JP17154384U JP17154384U JPS6185933U JP S6185933 U JPS6185933 U JP S6185933U JP 17154384 U JP17154384 U JP 17154384U JP 17154384 U JP17154384 U JP 17154384U JP S6185933 U JPS6185933 U JP S6185933U
- Authority
- JP
- Japan
- Prior art keywords
- operational amplifier
- output
- circuit
- input
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000003990 capacitor Substances 0.000 claims description 4
- 238000007599 discharging Methods 0.000 claims description 2
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Manipulation Of Pulses (AREA)
Description
第１図は本考案の実施例を示す回路図、第２図
はコンデンサの充電電圧を示す波形図、第３図は
従来の同期信号発生回路を示す回路図である。
１……コンパレータ、２……充放電回路、２３
……コンデンサ、３……加算回路、４……演算増
幅器、５……微分回路、６Ａ〜６Ｆ……同期信号
発生部、７……スイツチ部。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a waveform diagram showing the charging voltage of a capacitor, and FIG. 3 is a circuit diagram showing a conventional synchronizing signal generating circuit. 1...Comparator, 2...Charging/discharging circuit, 23
. . . capacitor, 3 . . . addition circuit, 4 . . . operational amplifier, 5 .
Claims (1)
のパルス出力を得る同期信号発生回路において、
交流信号が入力されて基準電圧と比較されるコン
パレータと、このコンパレータよりのパルスの出
力によりコンデンサを充放電する充放電回路と、
前記コンデンサの電圧と位相制御電圧との加算値
が一方の入力端に入力される演算増幅器と、この
演算増幅器の他方の入力端を、５０Ｈｚに対応し
た基準電源または６０Ｈｚに対応した基準電源の
一方に切替えて接続するスイツチ部と、前記演算
増幅器の出力を微分してパルス出力を得る微分回
路とを有して成ることを特徴とする同期信号発生
回路。 In a synchronization signal generation circuit that synchronizes with an AC signal and obtains a pulse output with a phase corresponding to a phase control voltage,
A comparator to which an AC signal is input and compared with a reference voltage, a charging/discharging circuit that charges and discharges a capacitor by the output of pulses from this comparator,
an operational amplifier into which the sum of the voltage of the capacitor and the phase control voltage is input to one input terminal; and the other input terminal of this operational amplifier is connected to one of a reference power source corresponding to 50 Hz or a reference power source corresponding to 60 Hz. 1. A synchronizing signal generating circuit comprising: a switch section that switches and connects the operational amplifier; and a differentiating circuit that differentiates the output of the operational amplifier to obtain a pulse output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17154384U JPH021964Y2 (en) | 1984-11-12 | 1984-11-12 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17154384U JPH021964Y2 (en) | 1984-11-12 | 1984-11-12 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6185933U true JPS6185933U (en) | 1986-06-05 |
| JPH021964Y2 JPH021964Y2 (en) | 1990-01-18 |
Family
ID=30729225
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17154384U Expired JPH021964Y2 (en) | 1984-11-12 | 1984-11-12 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH021964Y2 (en) |
-
1984
- 1984-11-12 JP JP17154384U patent/JPH021964Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH021964Y2 (en) | 1990-01-18 |
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