JPS63153182U - - Google Patents

Info

Publication number
JPS63153182U
JPS63153182U JP4704587U JP4704587U JPS63153182U JP S63153182 U JPS63153182 U JP S63153182U JP 4704587 U JP4704587 U JP 4704587U JP 4704587 U JP4704587 U JP 4704587U JP S63153182 U JPS63153182 U JP S63153182U
Authority
JP
Japan
Prior art keywords
signal
clock signal
event
event signal
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4704587U
Other languages
Japanese (ja)
Other versions
JPH0540469Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP4704587U priority Critical patent/JPH0540469Y2/ja
Publication of JPS63153182U publication Critical patent/JPS63153182U/ja
Application granted granted Critical
Publication of JPH0540469Y2 publication Critical patent/JPH0540469Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの考案の一実施例のブロツク図、第
2図は波形を示すタイムチヤートである。 6,8…デイレイライン、7…イベントパルス
発生回路、9…基本クロツク発生回路、10…信
号処理回路、21〜25…アナログスイツチ、4
1〜45…フリツプフロツプ。
FIG. 1 is a block diagram of an embodiment of this invention, and FIG. 2 is a time chart showing waveforms. 6, 8...Delay line, 7...Event pulse generation circuit, 9...Basic clock generation circuit, 10...Signal processing circuit, 21-25...Analog switch, 4
1 to 45...Flip Flop.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 低い周波数のクロツク信号を発生する手段と、
イベント信号からクロツク信号までの時間に相当
する時間だけイベント信号を遅延させる遅延手段
と、遅延させられたイベント信号を、上記クロツ
ク信号に同期して処理する信号処理手段とからな
る放射線検出回路。
means for generating a low frequency clock signal;
A radiation detection circuit comprising a delay means for delaying an event signal by a time corresponding to the time from the event signal to the clock signal, and a signal processing means for processing the delayed event signal in synchronization with the clock signal.
JP4704587U 1987-03-30 1987-03-30 Expired - Lifetime JPH0540469Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4704587U JPH0540469Y2 (en) 1987-03-30 1987-03-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4704587U JPH0540469Y2 (en) 1987-03-30 1987-03-30

Publications (2)

Publication Number Publication Date
JPS63153182U true JPS63153182U (en) 1988-10-07
JPH0540469Y2 JPH0540469Y2 (en) 1993-10-14

Family

ID=30867274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4704587U Expired - Lifetime JPH0540469Y2 (en) 1987-03-30 1987-03-30

Country Status (1)

Country Link
JP (1) JPH0540469Y2 (en)

Also Published As

Publication number Publication date
JPH0540469Y2 (en) 1993-10-14

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