JPS631242U - - Google Patents
Info
- Publication number
- JPS631242U JPS631242U JP9204486U JP9204486U JPS631242U JP S631242 U JPS631242 U JP S631242U JP 9204486 U JP9204486 U JP 9204486U JP 9204486 U JP9204486 U JP 9204486U JP S631242 U JPS631242 U JP S631242U
- Authority
- JP
- Japan
- Prior art keywords
- timer
- microprocessor
- signal
- pulse
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Debugging And Monitoring (AREA)
Description
第１図はこの考案の一実施例の構成を示すブロ
ツク図、第２図は同実施例の動作を説明するため
のタイムチヤート、第３図は従来のマイクロプロ
セツサの暴走検出回路の構成を示すブロツク図、
第４図はこの暴走検出回路の作用を説明するため
のタイムチヤートである。
１……マイクロプロセツサ、２，４……単安定
マルチバイブレータ、３……遅延回路、５……発
光ダイオード。なお、各図中同一符号は同一また
は相当部分を示す。
Fig. 1 is a block diagram showing the configuration of an embodiment of this invention, Fig. 2 is a time chart for explaining the operation of the same embodiment, and Fig. 3 shows the configuration of a conventional microprocessor runaway detection circuit. Block diagram shown,
FIG. 4 is a time chart for explaining the operation of this runaway detection circuit. 1... Microprocessor, 2, 4... Monostable multivibrator, 3... Delay circuit, 5... Light emitting diode. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
入力されない時間がＴ１になつた時点から再びパ
ルスが入力されるまで信号を発生する第１のタイ
マと、この第１のタイマの信号発生時間がＴ２以
上継続したとき前記マイクロプロセツサをリセツ
トさせる遅延回路と、前記第１のタイマから信号
を発生しない状態がＴ１およびＴ２よりも格段に
長いＴ３時間以上継続したとき信号を発生する第
２のタイマと、この第２のタイマの信号出力に応
動する表示器とを備え、前記マイクロプロセツサ
からＴ１より長く、Ｔ１＋Ｔ２より短い時間だけ
パルスが欠けるようなパルス列をＴ３時間よりも
短い繰返し周期で出力させるようにしたことを特
徴とするマイクロプロセツサの暴走検出回路。 A first timer receives the output of the microprocessor and generates a signal from the time when no pulse is inputted to T1 until a pulse is inputted again, and the signal generation time of this first timer is T1. a delay circuit that resets the microprocessor when the first timer continues for two or more hours; and a delay circuit that generates a signal when the first timer does not generate a signal for T3 hours or more, which is much longer than T1 and T2 . 2 timer and an indicator responsive to the signal output of the second timer, the microprocessor outputs a pulse train for T3 time such that a pulse is missing for a time longer than T1 and shorter than T1 + T2 . A runaway detection circuit for a microprocessor, characterized in that the circuit outputs the output at a repetition period shorter than that of the microprocessor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9204486U JPS631242U (en) | 1986-06-17 | 1986-06-17 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9204486U JPS631242U (en) | 1986-06-17 | 1986-06-17 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS631242U true JPS631242U (en) | 1988-01-07 |
Family
ID=30953383
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9204486U Pending JPS631242U (en) | 1986-06-17 | 1986-06-17 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS631242U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0372352U (en) * | 1989-11-20 | 1991-07-22 |
-
1986
- 1986-06-17 JP JP9204486U patent/JPS631242U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0372352U (en) * | 1989-11-20 | 1991-07-22 |
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