JPS6464351A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6464351A
JPS6464351A JP62222502A JP22250287A JPS6464351A JP S6464351 A JPS6464351 A JP S6464351A JP 62222502 A JP62222502 A JP 62222502A JP 22250287 A JP22250287 A JP 22250287A JP S6464351 A JPS6464351 A JP S6464351A
Authority
JP
Japan
Prior art keywords
region
transistor
source
drain
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62222502A
Other languages
Japanese (ja)
Inventor
Isao Morita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP62222502A priority Critical patent/JPS6464351A/en
Publication of JPS6464351A publication Critical patent/JPS6464351A/en
Pending legal-status Critical Current

Links

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To reduce one mask process by a method wherein a patterning operation of both gate electrodes is not executed at a time but is divided into two processes in such a way that the operation corresponds to a formation process of a source-drain region of both transistors. CONSTITUTION:During a first mask process, while a polycrystalline silicon layer 4 in a region to be used as a source-drain channel of a first transistor T1 and a region to be used as a channel and a part to be used as a prescribed circuit wiring region 4a of a second transistor T2 is left, the polycrystalline silicon layer on a region to be used as a source-drain of the second transistor T2 is removed; ions of arsenic are implanted selectively into the source-drain region of the second transistor T2 by making use of the polycrystalline silicon layer 4 as a mask; an n<+> source-drain 6 is formed. During a second mask process, while a resist layer on a whole part of the second transistor region T2 and a region to be used as a channel and the prescribed circuit wiring region 4a of the first transistor T1 is left, the resist in the region to be used as the source-drain of the first transistor is removed. By this setup, a CMOSIC is realized by applying two mask processes.
JP62222502A 1987-09-04 1987-09-04 Manufacture of semiconductor device Pending JPS6464351A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62222502A JPS6464351A (en) 1987-09-04 1987-09-04 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62222502A JPS6464351A (en) 1987-09-04 1987-09-04 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS6464351A true JPS6464351A (en) 1989-03-10

Family

ID=16783432

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62222502A Pending JPS6464351A (en) 1987-09-04 1987-09-04 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS6464351A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02266532A (en) * 1989-04-06 1990-10-31 Matsushita Electron Corp Manufacture of semiconductor device
US5272367A (en) * 1988-05-02 1993-12-21 Micron Technology, Inc. Fabrication of complementary n-channel and p-channel circuits (ICs) useful in the manufacture of dynamic random access memories (drams)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5272367A (en) * 1988-05-02 1993-12-21 Micron Technology, Inc. Fabrication of complementary n-channel and p-channel circuits (ICs) useful in the manufacture of dynamic random access memories (drams)
JPH02266532A (en) * 1989-04-06 1990-10-31 Matsushita Electron Corp Manufacture of semiconductor device

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