JPS56140655A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS56140655A
JPS56140655A JP4196180A JP4196180A JPS56140655A JP S56140655 A JPS56140655 A JP S56140655A JP 4196180 A JP4196180 A JP 4196180A JP 4196180 A JP4196180 A JP 4196180A JP S56140655 A JPS56140655 A JP S56140655A
Authority
JP
Japan
Prior art keywords
masks
poly
etched
oxide film
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4196180A
Other languages
Japanese (ja)
Other versions
JPS6129551B2 (en
Inventor
Hiroshi Momose
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP4196180A priority Critical patent/JPS56140655A/en
Publication of JPS56140655A publication Critical patent/JPS56140655A/en
Publication of JPS6129551B2 publication Critical patent/JPS6129551B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To contrive the improvement of a characteristic by simplifying the process and removing a mask lag by a method wherein the number of photoetching times for source-drain formation are reduced when CMOSFET is formed. CONSTITUTION:An N-well 2, a field oxide film 3 and a gate oxide film 4 are formed on a P type Si substrate 1, P-added poly-Si 5 being laid on the top thereof and the masks 8, 9 being formed by a phototyping method. The poly-Si 5 etched and the masks 8, 9 are removed. Then, the oxide film 4 is etched by utilizing poly- Si patterns 12, 13 to form the source and drain 15. Then, after resist masks 17, 18 are applied and the poly-Si 12 is etched, a B-injection is made to form a source- drain 19 of a P-channel with the resists 17, 18 as the masks. The resists are removed to finish the process. With this construction, the number of times of the mask fitting are decreased and a yield is elevated.
JP4196180A 1980-04-02 1980-04-02 Manufacture of semiconductor device Granted JPS56140655A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4196180A JPS56140655A (en) 1980-04-02 1980-04-02 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4196180A JPS56140655A (en) 1980-04-02 1980-04-02 Manufacture of semiconductor device

Publications (2)

Publication Number Publication Date
JPS56140655A true JPS56140655A (en) 1981-11-04
JPS6129551B2 JPS6129551B2 (en) 1986-07-07

Family

ID=12622777

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4196180A Granted JPS56140655A (en) 1980-04-02 1980-04-02 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS56140655A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6342161A (en) * 1986-08-07 1988-02-23 Toshiba Corp Manufacture of cmos type semiconductor device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04216226A (en) * 1990-12-17 1992-08-06 Tokyo Electric Co Ltd Received signal detector
JPH0548492A (en) * 1991-08-09 1993-02-26 Uchu Tsushin Kiso Gijutsu Kenkyusho:Kk Transmitter-receiver

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6342161A (en) * 1986-08-07 1988-02-23 Toshiba Corp Manufacture of cmos type semiconductor device

Also Published As

Publication number Publication date
JPS6129551B2 (en) 1986-07-07

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