JPS646041U - - Google Patents

Info

Publication number
JPS646041U
JPS646041U JP1987099366U JP9936687U JPS646041U JP S646041 U JPS646041 U JP S646041U JP 1987099366 U JP1987099366 U JP 1987099366U JP 9936687 U JP9936687 U JP 9936687U JP S646041 U JPS646041 U JP S646041U
Authority
JP
Japan
Prior art keywords
electrode body
chip
lead frame
lead wire
insulator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1987099366U
Other languages
Japanese (ja)
Other versions
JPH0546271Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987099366U priority Critical patent/JPH0546271Y2/ja
Publication of JPS646041U publication Critical patent/JPS646041U/ja
Application granted granted Critical
Publication of JPH0546271Y2 publication Critical patent/JPH0546271Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48095Kinked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4899Auxiliary members for wire connectors, e.g. flow-barriers, reinforcing structures, spacers, alignment aids
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案による絶縁物封止型半導体装置
の実施例を示す斜視図、第2図は第1図に示す実
施例に使用するチツプ状部材の他の実施例を示す
断面図、第3図は第1図の実施例を応用した樹脂
封止型複合ICを示す平面図、第4図は従来例を
示す斜視図、第5図はネイルヘツドボンデイング
法によるリード細線の接続方法を示す工程図であ
り、第5図Aはリード細線の先端部にボールを形
成する状態、第5図Bは第一の電極体に第一のボ
ンデイング部を形成する状態、第5図Cはキヤピ
ラリを移動する状態、第5図Dは第二の電極体に
第二のボンデイング部を形成する状態、第5図E
はリード細線を切断する状態を示す。 1……支持電極体、2……配線電極体(第一の
電極体)、3……配線電極体(第三の電極体)、
4……パワートランジスタチツプ(エミツタ電極
は第一の電極体)、6……チツプ状部材、6a…
…シリコン層、6b……絶縁層、6c……金属層
1 is a perspective view showing an embodiment of an insulator-sealed semiconductor device according to the present invention; FIG. 2 is a sectional view showing another embodiment of a chip-like member used in the embodiment shown in FIG. 1; Fig. 3 is a plan view showing a resin-sealed composite IC based on the embodiment shown in Fig. 1, Fig. 4 is a perspective view showing a conventional example, and Fig. 5 shows a method of connecting thin lead wires using the nail head bonding method. Figure 5A shows a state in which a ball is formed at the tip of a thin lead wire, Figure 5B shows a state in which a first bonding part is formed on a first electrode body, and Figure 5C shows a state in which a capillary is formed. The moving state in FIG. 5D is the state in which the second bonding part is formed on the second electrode body, FIG. 5E
indicates the state in which the thin lead wire is cut. 1...Supporting electrode body, 2...Wiring electrode body (first electrode body), 3...Wiring electrode body (third electrode body),
4... Power transistor chip (emitter electrode is the first electrode body), 6... Chip-shaped member, 6a...
...Silicon layer, 6b...Insulating layer, 6c...Metal layer.

Claims (1)

【実用新案登録請求の範囲】 (1) 第一の電極体と第二の電極体との間にリー
ドフレームの一部である第三の電極体が介在し、
該第三の電極体を跨いでリード細線が前記第一の
電極体と第二の電極体とを接続しており、前記第
三の電極体の一方の主面にはチツプ状部材が載置
され、前記第三の電極体とは反対側となる前記チ
ツプ状部材の主面は前記第三の電極体と電気的に
絶縁されており、前記リード細線と前記第三の電
極体が交差する位置において、前記チツプ状部材
の前記主面が前記リード細線と前記第三の電極体
の間に位置することを特徴とする絶縁物封止型半
導体装置。 (2) 前記チツプ状部材は前記リード細線の直下
に、前記リードフレームに半導体チツプを固着す
る工程と同一の工程内において固着されたもので
ある実用新案登録請求の範囲第(1)項記載の絶縁
物封止型半導体装置。 (3) 前記チツプ状部材はシリコンチツプであり
、該シリンコンチツプは、シリコン層と、前記リ
ード細線側に絶縁層として前記シリコン層に形成
されたシリコン酸化膜と、前記第三の電極体側に
金属層として前記シリコン層に付着されたニツケ
ル層とを有し、該ニツケル層は前記リードフレー
ムの表面に固着された実用新案登録請求の範囲第
(1)項記載の絶縁物封止型半導体装置。 (4) 前記第一の電極体と前記第二の電極体は、
リードフレーム、該リードフレームに固着された
回路基板上に形成された電極又は前記リードフレ
ーム若しくは前記回路基板上に固着された半導体
チツプ等の電子素子の電極である実用新案登録請
求の範囲第(1)項記載の絶縁物封止型半導体装置
[Claims for Utility Model Registration] (1) A third electrode body, which is a part of the lead frame, is interposed between the first electrode body and the second electrode body,
A thin lead wire straddles the third electrode body and connects the first electrode body and the second electrode body, and a chip-like member is placed on one main surface of the third electrode body. The main surface of the chip-like member opposite to the third electrode body is electrically insulated from the third electrode body, and the thin lead wire and the third electrode body intersect. An insulator-sealed semiconductor device characterized in that the main surface of the chip-like member is located between the thin lead wire and the third electrode body. (2) The chip-shaped member is fixed directly under the thin lead wire in the same process as the step of fixing the semiconductor chip to the lead frame. Insulator-encapsulated semiconductor device. (3) The chip-like member is a silicon chip, and the silicon chip includes a silicon layer, a silicon oxide film formed on the silicon layer as an insulating layer on the thin lead wire side, and a metal layer on the third electrode body side. and a nickel layer attached to the silicon layer, the nickel layer being fixed to the surface of the lead frame.
The insulator-sealed semiconductor device described in (1). (4) The first electrode body and the second electrode body are
Utility model registration claim No. 1 which is a lead frame, an electrode formed on a circuit board fixed to the lead frame, or an electrode of an electronic element such as a semiconductor chip fixed to the lead frame or the circuit board ) The insulator-sealed semiconductor device according to item 1.
JP1987099366U 1987-06-30 1987-06-30 Expired - Lifetime JPH0546271Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987099366U JPH0546271Y2 (en) 1987-06-30 1987-06-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987099366U JPH0546271Y2 (en) 1987-06-30 1987-06-30

Publications (2)

Publication Number Publication Date
JPS646041U true JPS646041U (en) 1989-01-13
JPH0546271Y2 JPH0546271Y2 (en) 1993-12-03

Family

ID=31326458

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987099366U Expired - Lifetime JPH0546271Y2 (en) 1987-06-30 1987-06-30

Country Status (1)

Country Link
JP (1) JPH0546271Y2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003037239A (en) * 2001-07-24 2003-02-07 Sanyo Electric Co Ltd Semiconductor device and manufacturing method therefor
WO2021060161A1 (en) * 2019-09-27 2021-04-01 株式会社村田製作所 Module

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60210845A (en) * 1984-04-05 1985-10-23 Toshiba Corp Resin sealed type semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60210845A (en) * 1984-04-05 1985-10-23 Toshiba Corp Resin sealed type semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003037239A (en) * 2001-07-24 2003-02-07 Sanyo Electric Co Ltd Semiconductor device and manufacturing method therefor
JP4618941B2 (en) * 2001-07-24 2011-01-26 三洋電機株式会社 Semiconductor device
WO2021060161A1 (en) * 2019-09-27 2021-04-01 株式会社村田製作所 Module

Also Published As

Publication number Publication date
JPH0546271Y2 (en) 1993-12-03

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