JPS6122362U - hybrid integrated circuit - Google Patents
hybrid integrated circuitInfo
- Publication number
- JPS6122362U JPS6122362U JP10727684U JP10727684U JPS6122362U JP S6122362 U JPS6122362 U JP S6122362U JP 10727684 U JP10727684 U JP 10727684U JP 10727684 U JP10727684 U JP 10727684U JP S6122362 U JPS6122362 U JP S6122362U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- substrate
- lower side
- insulating substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は本考案の一実施例の側面図、第２図は本考案の
他の実施例の側面図、第３図ａ， ｂはそれそれ従来の
半導体装置の側面図と正面図、第４図ａ，ｂはそれぞれ
他の従来例の側面図と正面図である。
１・・・・・・絶縁基板、２，３・・・・・・ワイヤボ
ンデイング導電ランド、４・・・・・・外部端子用導電
ランド、５，６・・・・・・外部端子、７・・・・・・
パッケージ部品用導電ランド、８・・・・・・スルーホ
ール、９・・・・・・ベアチップ、１０・・・・・・パ
ッケージ部品。FIG. 1 is a side view of one embodiment of the present invention, FIG. 2 is a side view of another embodiment of the present invention, FIGS. 3a and 3b are a side view and a front view of a conventional semiconductor device, respectively, and FIG. Figures 4a and 4b are a side view and a front view of another conventional example, respectively. 1... Insulating substrate, 2, 3... Wire bonding conductive land, 4... Conductive land for external terminal, 5, 6... External terminal, 7・・・・・・
Conductive land for package parts, 8...Through hole, 9...Bare chip, 10...Package component.
Claims (1)
チップまたは／およびパッケージされた回路部品とを備
えた混成集積回路において、前記搭載部品の最も大きい
部品の下辺の電極と接続される前記基板の導電ランドが
、前記基板の下辺に設けられている外部端子用電極の列
と同様に直接基板下辺に沿って設けられていることを特
徴とする混成集積回路。In a hybrid integrated circuit comprising an insulating substrate, and a bare chip of an active element mounted on the insulating substrate and/or a packaged circuit component, the substrate is connected to an electrode on the lower side of the largest component of the mounted components. A hybrid integrated circuit characterized in that a conductive land is provided directly along the lower side of the substrate, similar to the row of external terminal electrodes provided on the lower side of the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10727684U JPS6122362U (en) | 1984-07-16 | 1984-07-16 | hybrid integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10727684U JPS6122362U (en) | 1984-07-16 | 1984-07-16 | hybrid integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6122362U true JPS6122362U (en) | 1986-02-08 |
Family
ID=30666529
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10727684U Pending JPS6122362U (en) | 1984-07-16 | 1984-07-16 | hybrid integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6122362U (en) |
-
1984
- 1984-07-16 JP JP10727684U patent/JPS6122362U/en active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6122362U (en) | hybrid integrated circuit | |
| JP2514430Y2 (en) | Hybrid IC | |
| JPS58109254U (en) | Chip carrier for face-down connected chips | |
| JPS63187330U (en) | ||
| JPS5954956U (en) | semiconductor package | |
| JPS5881940U (en) | Mounting structure of semiconductor elements | |
| JPS602832U (en) | semiconductor equipment | |
| JPS6122380U (en) | hybrid integrated circuit board | |
| JPS6298242U (en) | ||
| JPS59192862U (en) | hybrid integrated circuit | |
| JPS6130250U (en) | semiconductor equipment | |
| JPS5989551U (en) | Semiconductor integrated circuit device | |
| JPS5970347U (en) | integrated circuit device | |
| JPS6066031U (en) | semiconductor equipment | |
| JPH01135736U (en) | ||
| JPS5945929U (en) | Semiconductor element mounting structure | |
| JPS58182438U (en) | semiconductor equipment | |
| JPS60149166U (en) | Hybrid integrated circuit device | |
| JPS60144252U (en) | semiconductor equipment | |
| JPH01121945U (en) | ||
| JPS59143051U (en) | integrated circuit device | |
| JPS63140625U (en) | ||
| JPS6416636U (en) | ||
| JPS6035541U (en) | semiconductor equipment | |
| JPS6127338U (en) | Hybrid integrated circuit device |