JPS6130250U - semiconductor equipment - Google Patents

semiconductor equipment

Info

Publication number
JPS6130250U
JPS6130250U JP1984114051U JP11405184U JPS6130250U JP S6130250 U JPS6130250 U JP S6130250U JP 1984114051 U JP1984114051 U JP 1984114051U JP 11405184 U JP11405184 U JP 11405184U JP S6130250 U JPS6130250 U JP S6130250U
Authority
JP
Japan
Prior art keywords
semiconductor equipment
external terminals
exposed
semiconductor device
conductive paint
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984114051U
Other languages
Japanese (ja)
Inventor
照男 室屋
Original Assignee
日本電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気株式会社 filed Critical 日本電気株式会社
Priority to JP1984114051U priority Critical patent/JPS6130250U/en
Publication of JPS6130250U publication Critical patent/JPS6130250U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/4901—Structure
    • H01L2224/4903—Connectors having different sizes, e.g. different diameters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図および第２図は本考案の一実施例の斜視図と断面
図である。 １・・・グランドピン、２・・・パッケージ、３・・・
導電面、４・・・ボンデイングワイヤ、５・・・素子。1 and 2 are a perspective view and a sectional view of an embodiment of the present invention. 1...Ground pin, 2...Package, 3...
Conductive surface, 4... bonding wire, 5... element.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プラスチック封止型半導体装置において、外部端子の出
ていない面に導電性の塗料を塗布し、かつ外部端子の出
ている面で外部端子の少なくとも一端子を該塗布面に導
電性塗料により電気的に接続したことを特徴とする半導
体装置。In a plastic-sealed semiconductor device, a conductive paint is applied to the surface where no external terminals are exposed, and at least one of the external terminals is electrically connected to the coated surface with the conductive paint on the surface where the external terminals are exposed. A semiconductor device characterized by being connected to.
JP1984114051U 1984-07-26 1984-07-26 semiconductor equipment Pending JPS6130250U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984114051U JPS6130250U (en) 1984-07-26 1984-07-26 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984114051U JPS6130250U (en) 1984-07-26 1984-07-26 semiconductor equipment

Publications (1)

Publication Number Publication Date
JPS6130250U true JPS6130250U (en) 1986-02-24

Family

ID=30673079

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984114051U Pending JPS6130250U (en) 1984-07-26 1984-07-26 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6130250U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001127211A (en) * 1999-10-26 2001-05-11 Nec Corp Semiconductor integrated circuit provided with electromagnetic wave noise shielding part and packaging structure for the semiconductor integrated circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001127211A (en) * 1999-10-26 2001-05-11 Nec Corp Semiconductor integrated circuit provided with electromagnetic wave noise shielding part and packaging structure for the semiconductor integrated circuit

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