JPS62122256A - Semiconductor device - Google Patents

Abstract

PURPOSE:To enhance the integration density of a semiconductor device, by providing electric conduction between mother chips through wires, which are connected to the pads of the mother chips. CONSTITUTION:Wiring layer 5 are formed in order to provide conduction between mother chips 4 or to the outside on a wiring substrate 2. A part of the wiring layer is electrically connected to a lead pin 11, which is provided at the side part of the wiring substrate 2. Wiring layers 12 are formed on the chips 4 by a means such as aluminum evaporation. The circuit forming surface of semiconductor pellet 3 is attached to each chip 4 through a copper bump electrode 7. One end of a piece of wire 8 is heated and fused, and a ball is formed and compressed to a bonding pad 6. Thus connection to the wire 8 is performed. The other end of the wire 8 is moved on the other pad 6. The side part of the wire 8 is compressed, and the wire is connected. Electric conduction between the chips 4 and to the outside is achieved by wires 8a hooked on the pads 7 of the chip 4 and the wiring layers 5 on the substrate 2. The surface of the substrate is covered with a cap 10 through low-melting-point glass and the like, and airtight sealing is achieved.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a technique that is effective when applied to a semiconductor device, particularly a technique for high-density mounting of a mother chip on a mounting substrate as part of a package.

[Background Art] With the development of electronic devices such as computers, there has been a demand for semiconductor devices with a high degree of integration that include a plurality of pellets.

A so-called silicon-on-silicon method is known as a technology for highly integrated pellet packaging in semiconductor devices. This silicon-on-silicon method involves surface-mounting multiple pellets on the surface of a mother chip made of a silicon wafer, but since there is a limit to the size of a single silicon wafer, mounting is difficult. The number of pellets that can be produced is also limited, and the inventors have found that this is a limitation from a packaging perspective when increasing the integration of semiconductor devices.

A detailed example of the technology for highly integrated packaging of semiconductor devices is given in Nikkei Electronics Special Edition "Micro Devices 1lh2JP130-P147" published by Nikkei McGraw-Hill on June 11, 1984.

[Object of the Invention] An object of the present invention is to provide a technique that can increase the degree of integration of a semiconductor device.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Summary of the Invention] A brief overview of typical inventions disclosed in this application is as follows.

That is, a mounting board on which a desired wiring layer is formed;
and a plurality of mother chips arranged on the mounting board with a plurality of pellets mounted thereon, and all or part of the electrical continuity between the mother chips is coupled to a pad of each mother chip. With the semiconductor device structure achieved using the wires, a plurality of mother chips can be mounted on the substrate at high density, and the degree of integration of the semiconductor device can be increased.

In addition, by sealing the surface of the board with a pancage,
Since the pellet space can be isolated from the outside air, the reliability of the semiconductor device can be improved.

[Example] FIG. 1 is a sectional view showing a semiconductor device that is an example of the present invention.

The semiconductor device 1 of this embodiment has a plurality of pellets 3 on it.
It consists of a mother chip 4 on which is attached, and a wiring board 1 on which the mother chip 4 is attached.

The wiring board 2 has a predetermined wiring layer 5 for establishing electrical continuity between each mother chip 4 or between the mother chip 4 and the outside.
is formed. This wiring layer 5 may have a multilayer structure, for example. A part of this wiring layer 5 is electrically connected to a lead pin 11 provided on the side of the wiring board 2, and by attaching a socket (not shown) to the lead bin 11, electrical connection with the outside can be established. The structure is designed to achieve this goal.

Further, each mother chip 4 is arranged on the surface of the wiring board 2 at a predetermined interval, and a predetermined wiring layer 12 is formed on the mother chip 4 by means such as vapor deposition of aluminum (AI). ing.

This wiring layer 12 can be formed, for example, by forming an aluminum film on the entire surface of a silicon wafer in vacuum by means of vapor deposition or the like, and then etching it into a predetermined shape using a photoresist method.

Further, a plurality of semiconductor pellets 3 are attached to the upper surface of the mother chip 4 via bump electrodes 7 made of copper (Cu) with their circuit forming surfaces facing the upper surface of the mother chip 4.

In this embodiment, electrical continuity between adjacent mother chips 4 is achieved by wires 8 made of gold (Au) or the like stretched between the mother chips 4. For example, this is done as follows.

First, using a bonding tool such as a capillary (not shown), one end of the wire 8 is heated and melted to form a pole. This molten ball portion is pressed against the bonding band 6 of the mother chip 4, and the wire 8 and the bonding band 6 are bonded together.
Performs joining with. At this time, ultrasonic vibration may be applied to the wire 8.

Next, the wire 8 is stretched so as to draw a loop shape, and the other end of the wire 8 is transferred onto the bonding pad 6 of one of the mother chips 4. Then, the wire 8 is joined to the bonding pad 6 by applying a pressing force to the abdomen of the wire 8. Finally, the extra line portion of the wire 8 is cut to complete the bonding process.

In this way, electrical continuity between the adjacent mother chips 4 is established directly between the bonding pads 6 by the wires 8
When this is achieved, the generation of noise between the mother chips 4 can be reduced.

Further, electrical continuity between mother chips 4 located apart from each other on the wiring board 2 or electrical continuity between the mother chips 4 and the outside is established between the bonding band 6 of the mother chip 4 and the wiring layer on the wiring board 2. This is achieved by a wire 8a stretched between the wire 5 and the wire 8a, and the tensioning of the wire 8a is performed in the same manner as described above.

The surface of the wiring board 2 is covered with a cap 10 having a U-shaped cross section through a low-melting glass 9 or the like, thereby achieving airtight sealing of the inside, that is, the mother chip 4, the pellet 3, etc.

As described above, since this embodiment has a structure in which a plurality of mother chips 4 are mounted in a single pancage, it is possible to reduce the unit area of each module, that is, each mother chip 4, and the height of the semiconductor device can be reduced. Integration can be achieved.

[Effects] (1) It has a mounting board on which a predetermined wiring layer is formed, and a plurality of mother chips arranged on the mounting board with a plurality of pellets mounted thereon, and the mother chip By creating a semiconductor device structure in which all or part of the electrical continuity between the mother chips is achieved by wires that directly connect the pads of each mother chip, multiple mother chips can be mounted on the board at high density. Therefore, the degree of integration of the semiconductor device can be increased.

(2) By sealing the surface of the substrate with a package, the pellet space can be isolated from the outside air;
The reliability of the semiconductor device can be improved.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.

For example, the lead pins have been described as having a structure that protrudes from the side surface of the package, but are not limited thereto, and may be protruded from the back surface of the wiring board.

[Brief explanation of drawings]

FIG. 1 is a sectional view showing a semiconductor device that is an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Semiconductor device, 2... Wiring board, 3... Pellet, 4... Mother chip, 5... Wiring layer, 6...
・Ponding pad, 7... Bump electrode, 8, 8a
... wire, 9 ... low melting point glass, 10 ... cap, 11 ... lead pin, 12 ... wiring layer. Figure 1 Queen β

Claims (1)

[Scope of Claims] 1. A mounting board having a desired wiring layer formed thereon, and a plurality of mother chips disposed on the mounting board with a plurality of pellets mounted thereon; A semiconductor device characterized in that electrical continuity between chips is achieved by wires coupled to pads of each mother chip. 2. The semiconductor device according to claim 1, wherein a mother chip disposed on the surface of the mounting substrate is sealed by a cap covering the surface of the mounting substrate. 3. The semiconductor device according to claim 1, wherein the mounting board is a printed wiring board.