JPS6459918A - Lift-off flattening process - Google Patents

Lift-off flattening process

Info

Publication number
JPS6459918A
JPS6459918A JP21881687A JP21881687A JPS6459918A JP S6459918 A JPS6459918 A JP S6459918A JP 21881687 A JP21881687 A JP 21881687A JP 21881687 A JP21881687 A JP 21881687A JP S6459918 A JPS6459918 A JP S6459918A
Authority
JP
Japan
Prior art keywords
type photoresist
negative type
thin film
photoresist
positive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21881687A
Other languages
Japanese (ja)
Other versions
JP2594572B2 (en
Inventor
Ichiro Ishida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62218816A priority Critical patent/JP2594572B2/en
Publication of JPS6459918A publication Critical patent/JPS6459918A/en
Application granted granted Critical
Publication of JP2594572B2 publication Critical patent/JP2594572B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To perform the flattening lift-off process suitable for fine opening part formed with high precision and in high reliability by a method wherein the primer layer processing precision by etching process is controlled by positive type photoresist. CONSTITUTION:A primer layer formed of a silicon dioxide thin film on a niobium substrate is coated with a negative type photoresist 3 and then overall surface is irradiated with ultraviolet rays 4 and a hardly melting part 3a is formed on the surface of the negative type photoresist 3. Later, the surface coated with positive type photoresist 5 and after heat treatment in nitrogen atmosphere, the positive type photoresist 5 is patterned by exposure development process. Next, the negative type photoresist 3 and the thin film 2 are selectively and continuously etched away by reactive ion etching process using the positive photoresist 5 as an etching mask to form an undercut part 6 and a deposited film 7 of niobium sputtered film on the base part of the negative type photoresist 3. Consequently, a surface flattened layer comprising the recession of thin film 2 filled with the deposited film 7 can be formed.
JP62218816A 1987-08-31 1987-08-31 Lift-off flattening method Expired - Fee Related JP2594572B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62218816A JP2594572B2 (en) 1987-08-31 1987-08-31 Lift-off flattening method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62218816A JP2594572B2 (en) 1987-08-31 1987-08-31 Lift-off flattening method

Publications (2)

Publication Number Publication Date
JPS6459918A true JPS6459918A (en) 1989-03-07
JP2594572B2 JP2594572B2 (en) 1997-03-26

Family

ID=16725794

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62218816A Expired - Fee Related JP2594572B2 (en) 1987-08-31 1987-08-31 Lift-off flattening method

Country Status (1)

Country Link
JP (1) JP2594572B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7311850B2 (en) * 2001-11-01 2007-12-25 Tdk Corporation Method of forming patterned thin film and method of fabricating micro device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5389673A (en) * 1977-01-19 1978-08-07 Oki Electric Ind Co Ltd Fine pattern forming method of semiconductor device
JPS5626440A (en) * 1979-08-10 1981-03-14 Oki Electric Ind Co Ltd Method for fine pattern formation
JPS574127A (en) * 1980-06-10 1982-01-09 Fujitsu Ltd Formation of conductor pattern
JPS57176727A (en) * 1981-04-21 1982-10-30 Nippon Telegr & Teleph Corp <Ntt> Forming method for pattern
JPS6074629A (en) * 1983-09-30 1985-04-26 Seiko Instr & Electronics Ltd Formation of thin film pattern

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5389673A (en) * 1977-01-19 1978-08-07 Oki Electric Ind Co Ltd Fine pattern forming method of semiconductor device
JPS5626440A (en) * 1979-08-10 1981-03-14 Oki Electric Ind Co Ltd Method for fine pattern formation
JPS574127A (en) * 1980-06-10 1982-01-09 Fujitsu Ltd Formation of conductor pattern
JPS57176727A (en) * 1981-04-21 1982-10-30 Nippon Telegr & Teleph Corp <Ntt> Forming method for pattern
JPS6074629A (en) * 1983-09-30 1985-04-26 Seiko Instr & Electronics Ltd Formation of thin film pattern

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7311850B2 (en) * 2001-11-01 2007-12-25 Tdk Corporation Method of forming patterned thin film and method of fabricating micro device

Also Published As

Publication number Publication date
JP2594572B2 (en) 1997-03-26

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees