JPS6455844A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6455844A
JPS6455844A JP21336487A JP21336487A JPS6455844A JP S6455844 A JPS6455844 A JP S6455844A JP 21336487 A JP21336487 A JP 21336487A JP 21336487 A JP21336487 A JP 21336487A JP S6455844 A JPS6455844 A JP S6455844A
Authority
JP
Japan
Prior art keywords
film
silicon oxide
gas
opening
pressure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21336487A
Other languages
Japanese (ja)
Other versions
JPH0622230B2 (en
Inventor
Yoshiaki Yamada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP21336487A priority Critical patent/JPH0622230B2/en
Publication of JPS6455844A publication Critical patent/JPS6455844A/en
Publication of JPH0622230B2 publication Critical patent/JPH0622230B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To vary the etching velocities of an interlayer insulating film above and below the film and to prevent upper layer wirings at the upper end of an opening from disconnecting liable to be generated by forming a silicon oxide film by depositing while stepwisely or continuously varying the pressure of Ar gas by a sputtering method from low to high as the interlayer insulating film. CONSTITUTION:A silicon oxide film 5 in Ar gas of pressure of 5X10<-3>Torr by a sputtering method on a surface including lower layer wirings 4 and a silicon oxide film 6 in Ar gas of 1X10<-2>Torr are sequentially laminated to form an interlayer insulating film. Then, a photoresist film 7 having a pattern for connecting the wirings 4 is formed on the film 6, with the film 7 as a mask the films 6, 7 are sequentially etched with buffered fluoric acid having higher etching velocity at higher pressure of Ar gas pressure at the time of forming the silicon oxide film to form a conical opening 8. Then, the photoresist film 7 is removed, an aluminum layer is deposited on the film 6 including the opening 8, selectively etched, connected to lower layer wirings 4 of the opening 8 to form upper layer wirings 9 extending on the film 7.
JP21336487A 1987-08-26 1987-08-26 Method for manufacturing semiconductor device Expired - Lifetime JPH0622230B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21336487A JPH0622230B2 (en) 1987-08-26 1987-08-26 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21336487A JPH0622230B2 (en) 1987-08-26 1987-08-26 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS6455844A true JPS6455844A (en) 1989-03-02
JPH0622230B2 JPH0622230B2 (en) 1994-03-23

Family

ID=16637955

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21336487A Expired - Lifetime JPH0622230B2 (en) 1987-08-26 1987-08-26 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPH0622230B2 (en)

Also Published As

Publication number Publication date
JPH0622230B2 (en) 1994-03-23

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