JPS644356B2 - - Google Patents

Info

Publication number
JPS644356B2
JPS644356B2 JP16736780A JP16736780A JPS644356B2 JP S644356 B2 JPS644356 B2 JP S644356B2 JP 16736780 A JP16736780 A JP 16736780A JP 16736780 A JP16736780 A JP 16736780A JP S644356 B2 JPS644356 B2 JP S644356B2
Authority
JP
Japan
Prior art keywords
tablet
double
sided
ceramic
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP16736780A
Other languages
Japanese (ja)
Other versions
JPS5791593A (en
Inventor
Seigo Senoo
Teruo Takai
Tatsuo Toyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP16736780A priority Critical patent/JPS5791593A/en
Publication of JPS5791593A publication Critical patent/JPS5791593A/en
Publication of JPS644356B2 publication Critical patent/JPS644356B2/ja
Granted legal-status Critical Current

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

【発明の詳細な説明】 本発明は、基板の両面に回路パターンを有し、
それら回路パターン間に基板を貫通した接続部が
設けられているセラミツク回路基板の製造方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention has a circuit pattern on both sides of a substrate,
The present invention relates to a method of manufacturing a ceramic circuit board in which a connecting portion passing through the board is provided between the circuit patterns.

従来、プリント回路(PCという)基板として
は、ベークライト、ガラス・エポキシなどの有機
材料に導体層を貼付けた積層板が主として使用さ
れていたが、近年、アルミナ系などのセラミツク
薄板を基板として用い、その表面に直接、導体パ
ターンを焼付けて形成したPC基板も併用される
ようになつてきた。
Conventionally, printed circuit (PC) boards have mainly been made of laminates made of organic materials such as Bakelite, glass, and epoxy with conductive layers attached, but in recent years, ceramic thin sheets such as alumina have been used as substrates. PC boards, which are formed by baking conductor patterns directly onto the surface, are also coming into use.

また、複雑化する回路構成に対応してPC基板
にも、表面、裏面の両面に導体パターンを有する
両面PC基板が多用されるようになり、そのため、
セラミツクPC基板においても両面接続部を数多
く有する基板が用いられるようになつてきた。
In addition, in response to increasingly complex circuit configurations, double-sided PC boards with conductor patterns on both the front and back sides are increasingly being used.
Ceramic PC boards that have many double-sided connection parts have come to be used.

このようなセラミツクPC基板における両面接
続部の構成としては、従来、例えば第1図に示す
ようなものが採用されていた。
Conventionally, the configuration of the double-sided connection portion in such a ceramic PC board has been adopted, for example, as shown in FIG. 1.

図において、1はセラミツク基板、2は接続部
に設けられている貫通孔、3は導体ペーストなど
の焼付けにより形成された導体パターンである。
In the figure, 1 is a ceramic substrate, 2 is a through hole provided in a connecting portion, and 3 is a conductive pattern formed by baking a conductive paste or the like.

このような接続部は次のようにして形成され
る。即ち、基板1の両面に導体パターン3を印刷
すると同時に適当な吸引手段によつて孔2の中に
導体ペーストを吸込ませ、孔2の内側にも導体パ
ターン3′が形成されるようにする。その後、全
体を焼成して導体パターン3,3′を基板1に焼
付ける。
Such a connection is formed as follows. That is, at the same time as the conductive patterns 3 are printed on both sides of the substrate 1, the conductive paste is sucked into the holes 2 by a suitable suction means so that the conductive patterns 3' are also formed inside the holes 2. Thereafter, the entire structure is fired to print the conductor patterns 3, 3' onto the substrate 1.

この第1図に示した両面接続部を有するセラミ
ツク基板によれば、接続部が設けられた部分の厚
さが基板の導体パターンを有する部分とほぼ同じ
に保たれるため、電子部品の塔載などに有利であ
るが、導体パターン3を印刷する際に真空吸引装
置など特殊な機器を要する上、吸引時に導体ペー
ストなどの導体材料が基板1の吸引側の面にまで
はみ出してパターンを乱してしまう恐れがあり、
かつ、このような導体材料のはみ出し部分が形成
されてしまうため、PC基板の製造に広く採用さ
れているすべり送りのような搬送方法が採用でき
なくなつて自動化が困難になるという欠点があつ
た。
According to the ceramic substrate having the double-sided connecting portions shown in FIG. 1, the thickness of the portion where the connecting portions are provided is kept approximately the same as the portion of the substrate having the conductor pattern, so electronic components can be mounted on the ceramic substrate. However, when printing the conductive pattern 3, special equipment such as a vacuum suction device is required, and the conductive material such as the conductive paste protrudes onto the suction side surface of the substrate 1 during suction, disturbing the pattern. There is a risk that
Moreover, since such protruding parts of the conductor material are formed, it is impossible to use a conveying method such as sliding feed, which is widely used in the manufacture of PC boards, making automation difficult. .

加えて、接続用の孔2の内面に均一に導体材料
を流し込むのが難しく、その確認も困難なため確
実な製品が得難くなつて歩留りがよくないという
欠点があつた。
In addition, it is difficult to uniformly pour the conductive material into the inner surface of the connection hole 2, and it is also difficult to confirm this, making it difficult to obtain reliable products and resulting in poor yields.

そこで、セラミツク基板における両面接続部の
構成としては、第2図に示すようなものも採用さ
れている。
Therefore, as the structure of the double-sided connecting portion in a ceramic substrate, the structure shown in FIG. 2 is also adopted.

第2図において、4は半田レジスト、5は接続
用端子、6は半田である。
In FIG. 2, 4 is a solder resist, 5 is a connection terminal, and 6 is solder.

即ち、この第2図から明らかなように、セラミ
ツク基板1に導体パターン3を形成してから必要
な部分に半田レジスト4を施こし、接続用の孔2
の中に銅などの金属材料からなる接続用の端子5
を挿入し、半田槽などにより半田付けを行なつて
半田6により導体パターン3と端子5とを接続す
るのである。
That is, as is clear from FIG. 2, after forming a conductor pattern 3 on a ceramic substrate 1, a solder resist 4 is applied to the necessary portions, and connection holes 2 are formed.
There is a connection terminal 5 made of metal material such as copper inside.
The conductive pattern 3 and the terminal 5 are connected by the solder 6 by inserting the conductor pattern 3 and performing soldering using a solder bath or the like.

この第2図に示した接続部によれば、常に確実
な接続が得られるが、接続部に端子5が挿入さ
れ、半田6によつて接続が行なわれているため、
この接続部が形成された部分にはその上に電子部
品を塔載できず、従つて基板の面積が大きくなつ
てしまうという欠点があつた。
According to the connection part shown in FIG. 2, a reliable connection can always be obtained, but since the terminal 5 is inserted into the connection part and the connection is made by solder 6,
There was a drawback that electronic components could not be mounted on the portion where the connection portion was formed, and the area of the board therefore increased.

本発明の目的は、上記した従来技術の欠点を除
き、製造が容易で確実な接続が得られ、しかも電
子部品などの集積度の向上が可能な両面接続部を
有するセラミツク回路基板の製造方法を提供する
ことにある。
An object of the present invention is to provide a method for manufacturing a ceramic circuit board having double-sided connecting portions that is easy to manufacture, provides reliable connections, and can improve the degree of integration of electronic components, etc., while eliminating the drawbacks of the prior art described above. It is about providing.

この目的を達成するため、本発明は、接続部に
設けた貫通孔内に導体パターン形成用の導体材料
と同じサーメツト材料のタブレツトを挿入し、該
タブレツトと導体材料とが一括して焼成されるこ
とにより接続部が構成されている点を特徴とす
る。
In order to achieve this object, the present invention inserts a tablet made of the same cermet material as the conductor material for forming the conductor pattern into a through hole provided in the connection part, and the tablet and the conductor material are fired together. It is characterized in that the connecting portion is configured by:

以下、本発明の実施例を図面の第3図ないし第
5図について説明する。
Embodiments of the present invention will be described below with reference to FIGS. 3 to 5 of the drawings.

第3図は本発明の一実施例で、7はサーメツト
のタブレツトである。なおセラミツク基板1、両
面接続部に設けられた貫通孔2、導体パターン3
などは第1図,第2図の従来例と同じである。
FIG. 3 shows an embodiment of the present invention, and 7 is a cermet tablet. In addition, the ceramic substrate 1, the through hole 2 provided in the double-sided connection part, and the conductor pattern 3
etc. are the same as the conventional examples shown in FIGS. 1 and 2.

この実施例に示したセラミツク回路基板の両面
接続部は次のようにして形成される。まず、アル
ミナ、フオルステライトなどのセラミツク基板1
の必要な部分に両面接続用の孔2を設け、この孔
2の中に、銀(Ag)、パラジウム(Pd)、銅
(Cu)、及びタングステン(W)などからなるサ
ーメツト材料のタブレツト7を挿入する。このタ
ブレツト7は、サーメツト材料の粉末を適当な方
法、例えば結着剤を用いて成形後乾燥させたもの
である。次に、これらのタブレツト7の両端面に
接触するように基板1の両面に適当な導体材料で
回路網を形成するのに必要な導体パターン3を印
刷する。その後、この接続部を有するセラミツク
基板1を800〜1600℃で焼成して導体パターン3
とタブレツト7を焼結し、接続部と導体パターン
3の形成を一括して行なう。
The double-sided connecting portions of the ceramic circuit board shown in this embodiment are formed as follows. First, a ceramic substrate 1 made of alumina, forsterite, etc.
A hole 2 for double-sided connection is provided in the required part of the tablet, and a tablet 7 made of a cermet material made of silver (Ag), palladium (Pd), copper (Cu), tungsten (W), etc. is placed in this hole 2. insert. This tablet 7 is made by molding a powder of cermet material by an appropriate method, for example using a binder, and then drying it. Next, conductive patterns 3 necessary for forming a circuit network are printed with suitable conductive material on both sides of the substrate 1 so as to contact both end faces of these tablets 7. Thereafter, the ceramic substrate 1 having this connection part is fired at 800 to 1600°C to form the conductor pattern 3.
The tablet 7 is then sintered, and the connecting portion and the conductor pattern 3 are formed all at once.

このようにすると、印刷された導体パターン3
とタブレツト7とはいずれもサーメツト材料なの
で、焼成して焼結されると一体化されてしまうた
め、基板1の両面にある導体パターン3は焼結さ
れたサーメツト7と機械的に完全に結合され、サ
ーメツト7によつて電気的な接続が完全に得られ
ることになる。
In this way, the printed conductor pattern 3
Since both the cermet material and the tablet 7 are made of cermet material, they will be integrated when fired and sintered, so the conductor pattern 3 on both sides of the substrate 1 will not be completely mechanically bonded to the sintered cermet 7. , a complete electrical connection is obtained by the cermet 7.

そして、孔2に挿入されたタブレツト7の両端
面が基板1の表面及び裏面とほぼ同一平面となる
ようにすることは極めて容易であり、従つて、導
体材料により導体パターン3を印刷した際にもタ
ブレツト7と導体パターン3との接触が不充分な
状態となる恐れはほとんどないから、常に確実な
接続が得られることになる。
It is extremely easy to make both end surfaces of the tablet 7 inserted into the hole 2 substantially flush with the front and back surfaces of the substrate 1. Therefore, when the conductive pattern 3 is printed using a conductive material, Since there is almost no possibility that the contact between the tablet 7 and the conductor pattern 3 will be insufficient, a reliable connection can always be obtained.

また、タブレツト7により接続部が形成されて
いる部分でも、導体パターン3の表面は他の部分
と同一平面に保たれ、基板1の両面に接続部によ
る凹凸が生じる恐れは全くない。
Further, even in the area where the connection part is formed by the tablet 7, the surface of the conductor pattern 3 is kept on the same plane as other parts, and there is no possibility that unevenness will occur on both sides of the substrate 1 due to the connection part.

そこで、この本発明の特長を活して両面接続部
が形成された部分に電子部品を塔載した一実施例
を第4図に示す。
FIG. 4 shows an embodiment in which an electronic component is mounted on a portion where a double-sided connection portion is formed by taking advantage of the features of the present invention.

第4図において、8は基板1の表面に形成され
ている導体パターン3の保護膜、9は電子部品で
ある。
In FIG. 4, 8 is a protective film for the conductive pattern 3 formed on the surface of the substrate 1, and 9 is an electronic component.

この電子部品9は、その端子部分を半田6によ
つて導体パターン3に接続することにより取付け
られている。なお、貫通孔2、タブレツト7は第
3図の実施例と同じである。
This electronic component 9 is attached by connecting its terminal portion to the conductive pattern 3 with solder 6. Incidentally, the through hole 2 and the tablet 7 are the same as those in the embodiment shown in FIG.

この実施例のように、本発明においては、接続
部を形成した導体パターン3の表面を平面に保つ
ことができるから、保護膜8を設けたり、その上
に電子部品9を塔載することが可能になり、集積
度を高めて基板面積を小さくすることが容易にで
きる。
As in this embodiment, in the present invention, since the surface of the conductive pattern 3 on which the connecting portion is formed can be kept flat, it is not possible to provide the protective film 8 or to mount the electronic component 9 thereon. This makes it easy to increase the degree of integration and reduce the substrate area.

第5図は本発明のさらに他の実施例を示したも
ので、両面接続部に多層配線を施こしたものであ
る。
FIG. 5 shows still another embodiment of the present invention, in which multilayer wiring is applied to the double-sided connection portion.

図において、10はタブレツト7による両面接
続部が形成された部分の導体パターン3の上に設
けた絶縁層、11は上部導体パターンである。な
お、その他は第3図、第4図の実施例と同じであ
る。
In the figure, 10 is an insulating layer provided on the conductor pattern 3 in the portion where the double-sided connection portion of the tablet 7 is formed, and 11 is the upper conductor pattern. Note that the other details are the same as the embodiments shown in FIGS. 3 and 4.

この実施例によれば、両面接続部の存在と無関
係に多層配線を設けることができるから、第4図
の実施例と同じように集積度の向上による小形化
が可能になる。
According to this embodiment, multilayer wiring can be provided regardless of the presence of double-sided connecting portions, so that it is possible to reduce the size by increasing the degree of integration as in the embodiment shown in FIG.

以上説明したように、本発明によれば、サーメ
ツト材料のタブレツトを基板の孔に挿入するとい
う簡単な構成で常に確実な接続が可能なセラミツ
ク基板の両面接続部が得られるから、従来技術の
欠点を除いて真空吸引装置などが不要で製造工程
の自動化が容易な上、両面接続部の上にも電子部
品の塔載や多層配線の形成が可能で小形化が容易
になり、しかも歩留りが高い両面接続部を有する
セラミツク回路基板をローコストで提供すること
ができる。
As explained above, according to the present invention, it is possible to obtain a double-sided connection part of a ceramic substrate that can always make a reliable connection with a simple structure of inserting a tablet of cermet material into a hole in the substrate, which eliminates the drawbacks of the prior art. It is easy to automate the manufacturing process as there is no need for a vacuum suction device, etc., and it is also possible to mount electronic components on top of double-sided connections and form multilayer wiring, making it easy to downsize and have a high yield. A ceramic circuit board having double-sided connection parts can be provided at low cost.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、及び第2図はいずれも両面接続部を有
するセラミツク回路基板の従来例を示す断面図、
第3図、第4図、それに第5図はそれぞれ本発明
によるセラミツク回路基板の製造方法の各実施例
により作成されたセラミツク回路基板の断面図で
ある。 1……セラミツク基板、2……両面接続部に設
けた貫通孔、3,11……導体パターン、6……
半田、7……サーメツト材料のタブレツト、8…
…保護膜、9……電子部品、10……絶縁層。
FIG. 1 and FIG. 2 are both cross-sectional views showing conventional examples of ceramic circuit boards having double-sided connection parts;
3, 4, and 5 are sectional views of ceramic circuit boards manufactured by each embodiment of the method of manufacturing a ceramic circuit board according to the present invention. DESCRIPTION OF SYMBOLS 1...Ceramic board, 2...Through hole provided in the double-sided connection part, 3, 11...Conductor pattern, 6...
Solder, 7... Cermet material tablet, 8...
...Protective film, 9...Electronic component, 10...Insulating layer.

Claims (1)

【特許請求の範囲】[Claims] 1 両面接続部を有するプリント回路用セラミツ
ク基板において、セラミツク基板の上記両面接続
部を形成すべき位置に存在する貫通孔に、銀―パ
ラジウム、銅、タングステン等のサーメツト材料
からなるタブレツトを挿入して穴埋めする工程
と、この貫通孔に挿入されたタブレツトの両端面
を含めて上記セラミツク基板の両面に、上記タブ
レツトと同一のサーメツト材料からなる導体ペー
ストによる回路パターンを形成する工程と、この
回路パターンが形成されたセラミツク基板を一括
焼成する工程とで構成したことを特徴とするセラ
ミツク回路基板の製造方法。
1. In a ceramic substrate for printed circuits having double-sided connecting parts, a tablet made of a cermet material such as silver-palladium, copper, or tungsten is inserted into a through hole in the ceramic substrate at a position where the double-sided connecting parts are to be formed. a step of filling the hole; a step of forming a circuit pattern using conductive paste made of the same cermet material as the tablet on both sides of the ceramic substrate including both end surfaces of the tablet inserted into the through hole; 1. A method for manufacturing a ceramic circuit board, comprising the step of collectively firing the formed ceramic substrate.
JP16736780A 1980-11-29 1980-11-29 Ceramic circuit board Granted JPS5791593A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16736780A JPS5791593A (en) 1980-11-29 1980-11-29 Ceramic circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16736780A JPS5791593A (en) 1980-11-29 1980-11-29 Ceramic circuit board

Publications (2)

Publication Number Publication Date
JPS5791593A JPS5791593A (en) 1982-06-07
JPS644356B2 true JPS644356B2 (en) 1989-01-25

Family

ID=15848392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16736780A Granted JPS5791593A (en) 1980-11-29 1980-11-29 Ceramic circuit board

Country Status (1)

Country Link
JP (1) JPS5791593A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11912834B2 (en) 2016-11-03 2024-02-27 Jeff Bullock Systems and methods for recycling post-consumer polyester-based fabric

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11912834B2 (en) 2016-11-03 2024-02-27 Jeff Bullock Systems and methods for recycling post-consumer polyester-based fabric

Also Published As

Publication number Publication date
JPS5791593A (en) 1982-06-07

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